/external/llvm/lib/DebugInfo/DWARF/ |
D | DWARFContext.cpp | 613 bool IsLE, bool Is64Bit) { in consumeCompressedZLibHeader() argument 619 DataExtractor Extractor(Data, IsLE, 0); in consumeCompressedZLibHeader() 637 SmallString<32> &Out, bool ZLibStyle, bool IsLE, in tryDecompress() argument 644 ZLibStyle ? consumeCompressedZLibHeader(Data, OriginalSize, IsLE, Is64Bit) in tryDecompress()
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/external/llvm/lib/Target/Mips/ |
D | MipsMSAInstrInfo.td | 3566 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 3567 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 3568 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 3569 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 3570 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 3571 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 3573 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 3574 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 3575 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 3576 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; [all …]
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D | MipsInstrInfo.td | 214 def IsLE : Predicate<"Subtarget->isLittle()">;
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 37 def IsLE : Predicate<"Subtarget->isLittleEndian()">; 1424 let Predicates = [IsLE] in { 1437 let Predicates = [IsLE] in { 1564 let Predicates = [IsLE] in { 1583 let Predicates = [IsLE] in { 1726 let Predicates = [IsLE] in { 1744 let Predicates = [IsLE] in { 2049 let Predicates = [IsLE] in { 2062 let Predicates = [IsLE] in { 2134 let Predicates = [IsLE] in { [all …]
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 1150 bool IsLE = DAG.getDataLayout().isLittleEndian(); in isVPKUHUMShuffleMask() local 1152 if (IsLE) in isVPKUHUMShuffleMask() 1158 if (!IsLE) in isVPKUHUMShuffleMask() 1164 unsigned j = IsLE ? 0 : 1; in isVPKUHUMShuffleMask() 1181 bool IsLE = DAG.getDataLayout().isLittleEndian(); in isVPKUWUMShuffleMask() local 1183 if (IsLE) in isVPKUWUMShuffleMask() 1190 if (!IsLE) in isVPKUWUMShuffleMask() 1197 unsigned j = IsLE ? 0 : 2; in isVPKUWUMShuffleMask() 1223 bool IsLE = DAG.getDataLayout().isLittleEndian(); in isVPKUDUMShuffleMask() local 1225 if (IsLE) in isVPKUDUMShuffleMask() [all …]
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D | PPCISelLowering.h | 439 unsigned &InsertAtByte, bool &Swap, bool IsLE);
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrNEON.td | 2353 (VLD1d16 addrmode6:$addr)>, Requires<[IsLE]>; 2355 (VST1d16 addrmode6:$addr, DPR:$value)>, Requires<[IsLE]>; 2357 (VLD1d8 addrmode6:$addr)>, Requires<[IsLE]>; 2359 (VST1d8 addrmode6:$addr, DPR:$value)>, Requires<[IsLE]>; 2372 (VLD1q32 addrmode6:$addr)>, Requires<[IsLE]>; 2374 (VST1q32 addrmode6:$addr, QPR:$value)>, Requires<[IsLE]>; 2376 (VLD1q16 addrmode6:$addr)>, Requires<[IsLE]>; 2378 (VST1q16 addrmode6:$addr, QPR:$value)>, Requires<[IsLE]>; 2380 (VLD1q8 addrmode6:$addr)>, Requires<[IsLE]>; 2382 (VST1q8 addrmode6:$addr, QPR:$value)>, Requires<[IsLE]>; [all …]
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D | ARMInstrThumb.td | 1440 Requires<[IsThumb, IsThumb1Only, IsLE]>; 1442 Requires<[IsThumb, IsThumb1Only, IsLE]>; 1444 Requires<[IsThumb, IsThumb1Only, IsLE]>;
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D | ARMInstrInfo.td | 330 def IsLE : Predicate<"MF->getDataLayout().isLittleEndian()">;
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/external/llvm/lib/Transforms/InstCombine/ |
D | InstCombineCompares.cpp | 3117 bool IsLE = (Pred == ICmpInst::ICMP_SLE || Pred == ICmpInst::ICMP_ULE); in canonicalizeCmpWithConstant() local 3121 assert(IsLE ? !CI->isMaxValue(IsSigned) : !CI->isMinValue(IsSigned)); in canonicalizeCmpWithConstant() 3137 if (!CI || (IsLE ? CI->isMaxValue(IsSigned) : CI->isMinValue(IsSigned))) in canonicalizeCmpWithConstant() 3147 Constant *OneOrNegOne = ConstantInt::get(Op1Type, IsLE ? 1 : -1, true); in canonicalizeCmpWithConstant() 3148 CmpInst::Predicate NewPred = IsLE ? ICmpInst::ICMP_ULT: ICmpInst::ICMP_UGT; in canonicalizeCmpWithConstant()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | DAGCombiner.cpp | 11293 bool IsLE = DAG.getDataLayout().isLittleEndian(); in MergeStoresOfConstantsOrVecElts() local 11295 unsigned Idx = IsLE ? (NumStores - 1 - i) : i; in MergeStoresOfConstantsOrVecElts()
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