Home
last modified time | relevance | path

Searched refs:IsPostIndex (Results 1 – 15 of 15) sorted by relevance

/external/vixl/src/aarch32/
Dassembler-aarch32.cc4659 operand.IsPostIndex() && ((rn.GetCode() & 0xf) != 0xf)) { in ldr()
4698 if ((offset >= -4095) && (offset <= 4095) && operand.IsPostIndex() && in ldr()
4770 if (operand.IsShiftValid() && operand.IsPostIndex() && in ldr()
4914 operand.IsPostIndex() && ((rn.GetCode() & 0xf) != 0xf)) { in ldrb()
4953 if ((offset >= -4095) && (offset <= 4095) && operand.IsPostIndex() && in ldrb()
5025 if (operand.IsShiftValid() && operand.IsPostIndex() && in ldrb()
5130 operand.IsPostIndex() && ((rn.GetCode() & 0xf) != 0xf)) { in ldrd()
5173 (offset >= -255) && (offset <= 255) && operand.IsPostIndex() && in ldrd()
5226 operand.IsPostIndex() && cond.IsNotNever() && in ldrd()
5460 operand.IsPostIndex() && ((rn.GetCode() & 0xf) != 0xf)) { in ldrh()
[all …]
Doperands-aarch32.h844 bool IsPostIndex() const { return GetAddrMode() == PostIndex; } in IsPostIndex() function
/external/vixl/src/aarch64/
Doperands-aarch64.cc481 bool MemOperand::IsPostIndex() const { return addrmode_ == PostIndex; } in IsPostIndex() function in vixl::aarch64::MemOperand
Dmacro-assembler-aarch64.cc1794 } else if (addr.IsPostIndex() && !IsImmLSUnscaled(offset)) { in LS_MACRO_LIST()
1846 } else if (addr.IsPostIndex()) { in LSPAIR_MACRO_LIST()
2248 VIXL_ASSERT(!(mem.IsPreIndex() || mem.IsPostIndex())); in LoadStoreCPURegListHelper()
Doperands-aarch64.h864 bool IsPostIndex() const;
Dassembler-aarch64.cc989 VIXL_ASSERT(addr.IsPostIndex()); in LoadStorePair()
1445 if (addr.IsPostIndex()) { in LoadStoreStructAddrModeField()
4300 if (addr.IsPostIndex() && IsImmLSUnscaled(offset)) { in LoadStoreMemOperand()
/external/v8/src/arm64/
Dassembler-arm64-inl.h539 bool MemOperand::IsPostIndex() const {
Dassembler-arm64.cc1623 DCHECK(addr.IsPostIndex()); in LoadStorePair()
2598 DCHECK(addr.IsPostIndex()); in LoadStore()
Dassembler-arm64.h665 inline bool IsPostIndex() const;
Dmacro-assembler-arm64.cc579 } else if (addr.IsPostIndex() && !IsImmLSUnscaled(offset)) { in LoadStoreMacro()
615 } else if (addr.IsPostIndex()) { in LoadStorePairMacro()
/external/vixl/test/aarch32/
Dtest-simulator-cond-rd-memop-immediate-8192-a32.cc3437 if (!memop.IsPostIndex()) { in TestHelper()
3480 if (!memop.IsPostIndex()) { in TestHelper()
Dtest-simulator-cond-rd-memop-immediate-512-a32.cc3437 if (!memop.IsPostIndex()) { in TestHelper()
3480 if (!memop.IsPostIndex()) { in TestHelper()
Dtest-simulator-cond-rd-memop-rs-a32.cc3450 if (!memop.IsPostIndex()) { in TestHelper()
3494 if (!memop.IsPostIndex()) { in TestHelper()
Dtest-simulator-cond-rd-memop-rs-shift-amount-1to31-a32.cc3446 if (!memop.IsPostIndex()) { in TestHelper()
3490 if (!memop.IsPostIndex()) { in TestHelper()
Dtest-simulator-cond-rd-memop-rs-shift-amount-1to32-a32.cc3446 if (!memop.IsPostIndex()) { in TestHelper()
3490 if (!memop.IsPostIndex()) { in TestHelper()