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Searched refs:KILL (Results 1 – 25 of 70) sorted by relevance

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/external/openssh/
Dopensshd.init.in9 KILL=@KILL@
50 ${KILL} ${PID}
/external/llvm/lib/CodeGen/
DExpandPostRAPseudos.cpp103 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerSubregToReg()
114 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerSubregToReg()
141 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerCopy()
156 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerCopy()
DPatchableFunction.cpp47 case TargetOpcode::KILL: in doesNotGeneratecode()
/external/llvm/test/CodeGen/Mips/
Ddelay-slot-kill.ll5 ; Currently, the following IR assembly generates a KILL instruction between
7 ; delay slot filler ignores such KILL instructions by filling the slot of the
/external/swiftshader/third_party/LLVM/include/llvm/Target/
DTargetOpcodes.h35 KILL = 5, enumerator
/external/ltp/testcases/kernel/tracing/ftrace_test/ftrace_stress/
Dftrace_trace_pipe.sh18 kill -KILL $this_pid
/external/compiler-rt/test/asan/TestCases/Android/
Dcoverage-android.cc115 #ifdef KILL in bar()
/external/mksh/src/
Dsignames.inc12 { "KILL", 9 },
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DExpandPostRAPseudos.cpp128 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerSubregToReg()
163 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerCopy()
/external/autotest/client/site_tests/platform_DaemonsRespawn/
Dtest_respawn.sh66 kill -KILL $PID
/external/ltp/testcases/kernel/tracing/ftrace_test/
Dftrace_stress_test.sh72 kill -KILL $kill_pid
/external/llvm/lib/Target/AMDGPU/
DR600EmitClauseMarkers.cpp48 case AMDGPU::KILL: in OccupiedDwords()
94 case AMDGPU::KILL: in IsTrivialInst()
/external/ltp/testcases/kernel/syscalls/ptrace/
Dspawn_ptrace_child.h130 SPT(KILL)
/external/llvm/test/CodeGen/X86/
Dpatchable-prologue.ll45 ; This testcase happens to produce a KILL instruction at the beginning of the
/external/llvm/lib/Target/Hexagon/
DHexagonNewValueJump.cpp133 if (II->getOpcode() == TargetOpcode::KILL) in INITIALIZE_PASS_DEPENDENCY()
197 if (MII->getOpcode() == TargetOpcode::KILL || in commonChecksToProhibitNewValueJump()
/external/llvm/test/CodeGen/MIR/ARM/
Dsched-it-debug-nodes.mir29 ; accidentally being marked as KILL. The DBG_VALUE node gets introduced in
32 ; debug value as KILL'ed, resulting in a DEBUG_VALUE node changing codegen! (or
/external/llvm/lib/Target/AMDGPU/MCTargetDesc/
DR600MCCodeEmitter.cpp94 MI.getOpcode() == AMDGPU::KILL) { in encodeInstruction()
/external/llvm/include/llvm/Target/
DTargetOpcodes.def36 /// KILL - This instruction is a noop that is used only to adjust the
39 HANDLE_TARGET_OPCODE(KILL, 5)
/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_opcode_tmp.h93 OP00(KILL)
/external/llvm/include/llvm/CodeGen/
DMachineInstr.h797 bool isKill() const { return getOpcode() == TargetOpcode::KILL; }
854 case TargetOpcode::KILL:
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCCodeEmitter.cpp125 case TargetOpcode::KILL: in emitBasicBlock()
/external/llvm/test/CodeGen/AMDGPU/
Ddetect-dead-lanes.mir241 # CHECK: KILL undef %0
253 KILL %0
/external/llvm/lib/Target/MSP430/
DMSP430InstrInfo.cpp306 case TargetOpcode::KILL: in GetInstSizeInBytes()
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DMachineInstr.h271 bool isKill() const { return getOpcode() == TargetOpcode::KILL; }
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
DMSP430InstrInfo.cpp309 case TargetOpcode::KILL: in GetInstSizeInBytes()

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