| /external/valgrind/none/tests/mips64/ |
| D | cvm_atomic.c | 178 BADDU, POP, DPOP, SAA, SAAD, LAA, LAAD, LAW, LAWD, LAI, LAID, LAD, LADD, enumerator
262 case LADD: { /* Load Atomic Decrement Double - ladd rd, (base) */ in main()
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| /external/javassist/src/main/javassist/bytecode/ |
| D | Opcode.java | 180 int LADD = 97; field
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| /external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
| D | XCoreISelLowering.h | 52 LADD, enumerator
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| D | XCoreISelLowering.cpp | 53 case XCoreISD::LADD : return "XCoreISD::LADD"; in getTargetNodeName()
730 unsigned Opcode = (N->getOpcode() == ISD::ADD) ? XCoreISD::LADD : in ExpandADDSUB()
1330 case XCoreISD::LADD: { in PerformDAGCombine()
1340 return DAG.getNode(XCoreISD::LADD, dl, DAG.getVTList(VT, VT), N1, N0, N2); in PerformDAGCombine()
1430 return DAG.getNode(XCoreISD::LADD, dl, DAG.getVTList(VT, VT), N2, N3, N1); in PerformDAGCombine()
1523 case XCoreISD::LADD: in computeMaskedBitsForTargetNode()
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| D | XCoreISelDAGToDAG.cpp | 183 case XCoreISD::LADD: { in Select()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.h | 55 LADD, enumerator
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| D | XCoreISelDAGToDAG.cpp | 163 case XCoreISD::LADD: { in Select()
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| D | XCoreISelLowering.cpp | 57 case XCoreISD::LADD : return "XCoreISD::LADD"; in getTargetNodeName()
745 unsigned Opcode = (N->getOpcode() == ISD::ADD) ? XCoreISD::LADD : in ExpandADDSUB()
1648 case XCoreISD::LADD: { in PerformDAGCombine()
1658 return DAG.getNode(XCoreISD::LADD, dl, DAG.getVTList(VT, VT), N1, N0, N2); in PerformDAGCombine()
1749 DAG.getNode(XCoreISD::LADD, dl, DAG.getVTList(VT, VT), N2, N3, N1); in PerformDAGCombine()
1846 case XCoreISD::LADD: in computeKnownBitsForTargetNode()
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| /external/jacoco/org.jacoco.core.test/src/org/jacoco/core/internal/flow/ |
| D | LabelFlowAnalyzerTest.java | 189 testInsn(LADD, true); in testInsn()
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| /external/javassist/src/main/javassist/compiler/ |
| D | CodeGen.java | 934 '+', DADD, FADD, LADD, IADD,
1718 bytecode.addOpcode(token == PLUSPLUS ? LADD : LSUB); in atPlusPlus()
1804 bytecode.addOpcode(token == PLUSPLUS ? LADD : LSUB); in atPlusPlusCore()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 551 LADD, LSUB, LOR, LXOR, LAND, enumerator
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| D | X86InstrInfo.td | 257 def X86lock_add : SDNode<"X86ISD::LADD", SDTLockBinaryArithWithFlags,
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| D | X86ISelLowering.cpp | 21178 NewOpc = X86ISD::LADD; in lowerAtomicArithWithLOCK()
22167 case X86ISD::LADD: return "X86ISD::LADD"; in getTargetNodeName()
30909 return DAG.getMemIntrinsicNode(X86ISD::LADD, DL, in combineLockSub()
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| /external/r8/src/main/java/com/android/tools/r8/ir/conversion/ |
| D | JarSourceCode.java | 1033 case Opcodes.LADD: in opType()
1296 case Opcodes.LADD: in updateState()
2023 case Opcodes.LADD: in build()
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| /external/javassist/src/main/javassist/bytecode/analysis/ |
| D | Executor.java | 309 case LADD: in execute()
|