Searched refs:MFCR (Results 1 – 13 of 13) sorted by relevance
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 118 MFCR, enumerator
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| D | PPCAsmPrinter.cpp | 373 TmpInst.setOpcode(PPC::MFCR); in EmitInstruction()
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| D | PPCInstrInfo.td | 1098 // This is a pseudo for MFCR, which implicitly uses all 8 of its subregisters;
1101 // MFCR <kill of whatever preg got assigned to vreg>
1112 def MFCR : XFXForm_3<31, 19, (outs GPRC:$rT), (ins),
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| D | PPCISelDAGToDAG.cpp | 835 case PPCISD::MFCR: { in Select()
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| D | PPCISelLowering.cpp | 456 case PPCISD::MFCR: return "PPCISD::MFCR"; in getTargetNodeName()
4392 SDValue Flags = DAG.getNode(PPCISD::MFCR, dl, MVT::i32, in LowerINTRINSIC_WO_CHAIN()
5385 if (FlagUser->getOpcode() == PPCISD::MFCR) in PerformDAGCombine()
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| /external/v8/src/ppc/ |
| D | disasm-ppc.cc | 802 case MFCR: { in DecodeExt2()
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| D | constants-ppc.h | 1775 V(mfcr, MFCR, 0x7C000026) \
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| D | assembler-ppc.cc | 1931 void Assembler::mfcr(Register dst) { emit(EXT2 | MFCR | dst.code() * B21); } in mfcr()
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| D | simulator-ppc.cc | 2594 case MFCR: { in ExecuteExt2_9bit_part2()
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| /external/pcre/dist2/src/sljit/ |
| D | sljitNativePPC_common.c | 182 #define MFCR (HI(31) | LO(19)) macro
2212 FAIL_IF(push_inst(compiler, MFCR | D(dst))); \
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCAsmPrinter.cpp | 968 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; in EmitInstruction()
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| D | PPCFrameLowering.cpp | 1760 CRMIB = BuildMI(*MF, DL, TII.get(PPC::MFCR), PPC::R12) in spillCalleeSavedRegisters()
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| D | PPCInstrInfo.td | 2400 def MFCR : XFXForm_3<31, 19, (outs gprc:$rT), (ins),
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