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/external/mesa3d/src/mesa/drivers/dri/r200/
Dradeon_tile.c59 for (j = 0; j < MIN2(tile_height, height - row); ++j) in micro_tile_8_x_4_8bit()
61 unsigned columns = MIN2(tile_width, width - col); in micro_tile_8_x_4_8bit()
90 for (j = 0; j < MIN2(tile_height, height - row); ++j) in micro_tile_4_x_4_16bit()
92 unsigned columns = MIN2(tile_width, width - col); in micro_tile_4_x_4_16bit()
121 for (j = 0; j < MIN2(tile_height, height - row); ++j) in micro_tile_8_x_2_16bit()
123 unsigned columns = MIN2(tile_width, width - col); in micro_tile_8_x_2_16bit()
152 for (j = 0; j < MIN2(tile_height, height - row); ++j) in micro_tile_4_x_2_32bit()
154 unsigned columns = MIN2(tile_width, width - col); in micro_tile_4_x_2_32bit()
183 for (j = 0; j < MIN2(tile_height, height - row); ++j) in micro_tile_2_x_2_64bit()
185 unsigned columns = MIN2(tile_width, width - col); in micro_tile_2_x_2_64bit()
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/external/mesa3d/src/mesa/drivers/dri/radeon/
Dradeon_tile.c59 for (j = 0; j < MIN2(tile_height, height - row); ++j) in micro_tile_8_x_4_8bit()
61 unsigned columns = MIN2(tile_width, width - col); in micro_tile_8_x_4_8bit()
90 for (j = 0; j < MIN2(tile_height, height - row); ++j) in micro_tile_4_x_4_16bit()
92 unsigned columns = MIN2(tile_width, width - col); in micro_tile_4_x_4_16bit()
121 for (j = 0; j < MIN2(tile_height, height - row); ++j) in micro_tile_8_x_2_16bit()
123 unsigned columns = MIN2(tile_width, width - col); in micro_tile_8_x_2_16bit()
152 for (j = 0; j < MIN2(tile_height, height - row); ++j) in micro_tile_4_x_2_32bit()
154 unsigned columns = MIN2(tile_width, width - col); in micro_tile_4_x_2_32bit()
183 for (j = 0; j < MIN2(tile_height, height - row); ++j) in micro_tile_2_x_2_64bit()
185 unsigned columns = MIN2(tile_width, width - col); in micro_tile_2_x_2_64bit()
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/external/mesa3d/src/gallium/auxiliary/util/
Du_box.h129 x = MIN2(a->x, b->x); in u_box_union_2d()
130 y = MIN2(a->y, b->y); in u_box_union_2d()
145 x = MIN2(a->x, b->x); in u_box_union_3d()
146 y = MIN2(a->y, b->y); in u_box_union_3d()
147 z = MIN2(a->z, b->z); in u_box_union_3d()
164 a_l[0] = MIN2(a->x, a->x + a->width); in u_box_test_intersection_2d()
166 a_l[1] = MIN2(a->y, a->y + a->height); in u_box_test_intersection_2d()
169 b_l[0] = MIN2(b->x, b->x + b->width); in u_box_test_intersection_2d()
171 b_l[1] = MIN2(b->y, b->y + b->height); in u_box_test_intersection_2d()
Du_framebuffer.c156 w = MIN2(w, fb->cbufs[i]->width); in util_framebuffer_min_size()
157 h = MIN2(h, fb->cbufs[i]->height); in util_framebuffer_min_size()
161 w = MIN2(w, fb->zsbuf->width); in util_framebuffer_min_size()
162 h = MIN2(h, fb->zsbuf->height); in util_framebuffer_min_size()
Du_range.h63 range->start = MIN2(start, range->start); in util_range_add()
72 return MAX2(start, range->start) < MIN2(end, range->end); in util_ranges_intersect()
Du_rect.h104 d->x0 = MIN2(a->x0, b->x0); in u_rect_union()
105 d->y0 = MIN2(a->y0, b->y0); in u_rect_union()
/external/mesa3d/src/gallium/drivers/vc4/
Dvc4_emit.c54 maxx = MIN2(vp_maxx, job->draw_width); in vc4_emit_state()
55 maxy = MIN2(vp_maxy, job->draw_height); in vc4_emit_state()
59 maxx = MIN2(vp_maxx, vc4->scissor.maxx); in vc4_emit_state()
60 maxy = MIN2(vp_maxy, vc4->scissor.maxy); in vc4_emit_state()
69 job->draw_min_x = MIN2(job->draw_min_x, minx); in vc4_emit_state()
70 job->draw_min_y = MIN2(job->draw_min_y, miny); in vc4_emit_state()
Dvc4_qir_live_variables.c66 c->temp_start[var] = MIN2(c->temp_start[var], ip); in qir_setup_use()
107 c->temp_start[var] = MIN2(c->temp_start[var], ip); in qir_setup_def()
283 c->temp_start[i] = MIN2(c->temp_start[i], in qir_compute_start_end()
290 c->temp_start[i] = MIN2(c->temp_start[i], in qir_compute_start_end()
/external/mesa3d/src/mesa/tnl_dd/
Dt_dd_dmatmp2.h184 nr = MIN2( dmasz, count - j ); in TAG()
239 nr = MIN2( dmasz, count - j ); in TAG()
265 nr = MIN2( dmasz, count - j ); in TAG()
338 nr = MIN2( dmasz, count - j ); in TAG()
379 nr = MIN2( dmasz, count - j ); in TAG()
443 nr = MIN2( dmasz, count - j ); in TAG()
496 nr = MIN2( dmasz, count - j ); in TAG()
556 nr = MIN2( dmasz, count - j ); in TAG()
593 nr = MIN2( dmasz, count - j ); in TAG()
625 nr = MIN2( dmasz, count - j ); in TAG()
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Dt_dd_dmatmp.h83 nr = MIN2(currentsz, count - j); in TAG()
115 nr = MIN2(currentsz, count - j); in TAG()
139 nr = MIN2(currentsz, count - j); in TAG()
172 nr = MIN2(currentsz, count - j); in TAG()
222 nr = MIN2(currentsz, count - j); in TAG()
252 nr = MIN2(currentsz, count - j); in TAG()
278 nr = MIN2(currentsz, count - j + 1); in TAG()
310 nr = MIN2(currentsz, count - j + 1); in TAG()
355 nr = MIN2(currentsz, count - j); in TAG()
/external/mesa3d/src/mesa/swrast/
Ds_blend.c263 rgba[i][RCOMP] = (GLubyte) MIN2( r, 255 ); in blend_add()
264 rgba[i][GCOMP] = (GLubyte) MIN2( g, 255 ); in blend_add()
265 rgba[i][BCOMP] = (GLubyte) MIN2( b, 255 ); in blend_add()
266 rgba[i][ACOMP] = (GLubyte) MIN2( a, 255 ); in blend_add()
279 rgba[i][RCOMP] = (GLshort) MIN2( r, 255 ); in blend_add()
280 rgba[i][GCOMP] = (GLshort) MIN2( g, 255 ); in blend_add()
281 rgba[i][BCOMP] = (GLshort) MIN2( b, 255 ); in blend_add()
282 rgba[i][ACOMP] = (GLshort) MIN2( a, 255 ); in blend_add()
322 rgba[i][RCOMP] = MIN2( rgba[i][RCOMP], dest[i][RCOMP] ); in blend_min()
323 rgba[i][GCOMP] = MIN2( rgba[i][GCOMP], dest[i][GCOMP] ); in blend_min()
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/external/mesa3d/src/mesa/main/
Dtexcompress_etc.c686 const unsigned h = MIN2(bh, height - y); in etc2_unpack_rgb8()
693 const unsigned w = MIN2(bw, width - x); in etc2_unpack_rgb8()
730 const unsigned h = MIN2(bh, height - y); in etc2_unpack_srgb8()
733 const unsigned w = MIN2(bw, width - x); in etc2_unpack_srgb8()
777 const unsigned h = MIN2(bh, height - y); in etc2_unpack_rgba8()
780 const unsigned w = MIN2(bw, width - x); in etc2_unpack_rgba8()
815 const unsigned h = MIN2(bh, height - y); in etc2_unpack_srgb8_alpha8()
819 const unsigned w = MIN2(bw, width - x); in etc2_unpack_srgb8_alpha8()
859 const unsigned h = MIN2(bh, height - y); in etc2_unpack_r11()
863 const unsigned w = MIN2(bw, width - x); in etc2_unpack_r11()
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Dstreaming-load-memcpy.c55 memcpy(d, s, MIN2(bytes_before_alignment_boundary, len)); in _mesa_streaming_load_memcpy()
59 len -= MIN2(bytes_before_alignment_boundary, len); in _mesa_streaming_load_memcpy()
/external/mesa3d/src/gallium/auxiliary/draw/
Ddraw_split_tmp.h90 draw_pt_trim_count(MIN2(max_count_simple, count), first, incr); in FUNC()
118 draw_pt_trim_count(MIN2(max_count_loop, count), first, incr); in FUNC()
141 draw_pt_trim_count(MIN2(max_count_fan, count), first, incr); in FUNC()
/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_fs_live_variables.cpp62 start[var] = MIN2(start[var], ip); in setup_one_read()
80 start[var] = MIN2(start[var], ip); in setup_one_write()
216 start[i] = MIN2(start[i], block->start_ip); in compute_start_end()
221 start[i] = MIN2(start[i], block->end_ip); in compute_start_end()
315 virtual_grf_start[vgrf] = MIN2(virtual_grf_start[vgrf], in calculate_live_intervals()
Dbrw_vec4_live_variables.cpp261 start[v] = MIN2(start[v], ip); in calculate_live_intervals()
273 start[v] = MIN2(start[v], ip); in calculate_live_intervals()
295 start[i] = MIN2(start[i], block->start_ip); in calculate_live_intervals()
300 start[i] = MIN2(start[i], block->end_ip); in calculate_live_intervals()
320 start = MIN2(start, virtual_grf_start[v + i]); in var_range_start()
Dgen6_scissor_state.c65 bbox[1] = MIN2(bbox[0] + ctx->ViewportArray[i].Width, fb_width); in gen6_upload_scissor_state()
67 bbox[3] = MIN2(bbox[2] + ctx->ViewportArray[i].Height, fb_height); in gen6_upload_scissor_state()
Dintel_blit.c257 const uint32_t chunk_w = MIN2(max_chunk_size, width - chunk_x); in emit_miptree_blit()
258 const uint32_t chunk_h = MIN2(max_chunk_size, height - chunk_y); in emit_miptree_blit()
869 pitch = ROUND_DOWN_TO(MIN2(size, (1 << 15) - 64), 4); in intel_emit_linear_blit()
874 pitch = ALIGN(MIN2(size, (1 << 15) - 64), 4); in intel_emit_linear_blit()
885 MIN2(size, pitch), height, /* w, h */ in intel_emit_linear_blit()
889 MIN2(size, pitch), height); in intel_emit_linear_blit()
958 const uint32_t chunk_w = MIN2(max_chunk_size, width - chunk_x); in intel_miptree_set_alpha_to_one()
959 const uint32_t chunk_h = MIN2(max_chunk_size, height - chunk_y); in intel_miptree_set_alpha_to_one()
/external/mesa3d/src/util/
Dmacros.h240 #define MIN2( A, B ) ( (A)<(B) ? (A) : (B) ) macro
246 #define MIN3( A, B, C ) ((A) < (B) ? MIN2(A, C) : MIN2(B, C))
/external/mesa3d/src/gallium/drivers/radeon/
Dr600_viewport.c105 out->maxx = MIN2(out->maxx, clip->maxx); in r600_clip_scissor()
106 out->maxy = MIN2(out->maxy, clip->maxy); in r600_clip_scissor()
112 out->minx = MIN2(out->minx, in->minx); in r600_scissor_make_union()
113 out->miny = MIN2(out->miny, in->miny); in r600_scissor_make_union()
198 guardband_x = MIN2(-left, right); in r600_emit_guardband()
199 guardband_y = MIN2(-top, bottom); in r600_emit_guardband()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_perfcounter.c422 *num_select_dw = 4 + count + MIN2(count, regs->num_multi) + regs->num_prelude; in si_pc_get_size()
425 *num_select_dw = 3 * (count + MIN2(count, regs->num_multi)); in si_pc_get_size()
429 *num_select_dw = 2 + count + MIN2(count, regs->num_multi) + regs->num_prelude; in si_pc_get_size()
491 for (idx = 0; idx < MIN2(count, regs->num_multi); ++idx) in si_pc_emit_select()
500 for (idx = 0; idx < MIN2(count, regs->num_multi); ++idx) in si_pc_emit_select()
519 select1_count = MIN2(count, regs->num_multi); in si_pc_emit_select()
534 unsigned reg_count = count + MIN2(count, regs->num_multi); in si_pc_emit_select()
/external/mesa3d/src/mesa/state_tracker/
Dst_sampler_view.c337 unsigned ret = MIN2(stObj->base.MinLevel + stObj->base._MaxLevel, in last_level()
340 ret = MIN2(ret, stObj->base.MinLevel + stObj->base.NumLevels - 1); in last_level()
349 return MIN2(stObj->base.MinLayer + stObj->base.NumLayers - 1, in last_layer()
423 size = MIN2(stObj->pt->width0 - base, (unsigned)stObj->base.BufferSize); in st_create_texture_sampler_view_from_stobj()
476 MAYBE_UNUSED unsigned size = MIN2(stObj->pt->width0 - base, in st_get_texture_sampler_view_from_stobj()
Dst_gen_mipmap.c64 numLevels = MIN2(numLevels, (GLuint) texObj->MaxLevel + 1); in compute_num_levels()
66 numLevels = MIN2(numLevels, texObj->NumLevels); in compute_num_levels()
/external/mesa3d/src/gallium/drivers/nouveau/nv30/
Dnv30_push.c91 unsigned push = MIN2(count, ctx->packet_vertex_limit); in emit_vertices_i08()
123 unsigned push = MIN2(count, ctx->packet_vertex_limit); in emit_vertices_i16()
155 unsigned push = MIN2(count, ctx->packet_vertex_limit); in emit_vertices_i32()
185 unsigned push = MIN2(count, ctx->packet_vertex_limit); in emit_vertices_seq()
/external/mesa3d/src/gallium/drivers/svga/
Dsvga_screen.c227 levels = MIN2(util_logbase2(result.u) + 1, levels); in svga_get_param()
231 levels = MIN2(util_logbase2(result.u) + 1, levels); in svga_get_param()
240 return MIN2(util_logbase2(result.u) + 1, SVGA_MAX_TEXTURE_LEVELS); in svga_get_param()
247 return MIN2(screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS), in svga_get_param()
469 return MIN2(val, SVGA3D_TEMPREG_MAX); in vgpu9_get_shader_param()
537 return MIN2(val, SVGA3D_TEMPREG_MAX); in vgpu9_get_shader_param()
1071 svgascreen->maxPointSize = MIN2(svgascreen->maxPointSize, 80.0f); in svga_screen_create()

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