Searched refs:MI_PREDICATE_SRC0 (Results 1 – 5 of 5) sorted by relevance
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_compute.c | 59 OUT_BATCH(MI_PREDICATE_SRC0 + 4); in prepare_indirect_gpgpu_walker()
68 brw_load_register_mem(brw, MI_PREDICATE_SRC0, bo, in prepare_indirect_gpgpu_walker()
81 brw_load_register_mem(brw, MI_PREDICATE_SRC0, bo, in prepare_indirect_gpgpu_walker()
94 brw_load_register_mem(brw, MI_PREDICATE_SRC0, bo, in prepare_indirect_gpgpu_walker()
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| D | brw_conditional_render.c | 66 MI_PREDICATE_SRC0, in set_predicate_for_result()
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| D | hsw_queryobj.c | 307 brw_load_register_mem64(brw, MI_PREDICATE_SRC0, query_bo, in set_predicate()
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| D | brw_defines.h | 3198 #define MI_PREDICATE_SRC0 0x2400 macro
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| /external/mesa3d/src/intel/vulkan/ |
| D | genX_cmd_buffer.c | 1926 #define MI_PREDICATE_SRC0 0x2400 macro
1963 emit_lri(batch, MI_PREDICATE_SRC0 + 4, 0); in genX()
1968 emit_lrm(batch, MI_PREDICATE_SRC0, bo, bo_offset + 0); in genX()
1978 emit_lrm(batch, MI_PREDICATE_SRC0, bo, bo_offset + 4); in genX()
1988 emit_lrm(batch, MI_PREDICATE_SRC0, bo, bo_offset + 8); in genX()
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