| /external/llvm/test/CodeGen/X86/ |
| D | implicit-null-checks.mir | 95 # CHECK: %eax = MOV32ri 2200000
111 %eax = MOV32ri 2200000
117 %eax = MOV32ri 200
121 %eax = MOV32ri 42
125 %eax = MOV32ri 100
158 %eax = MOV32ri 2200000
166 %eax = MOV32ri 200
174 %eax = MOV32ri 100
204 %eax = MOV32ri 2200000
211 %eax = MOV32ri 200
[all …]
|
| D | pr27681.mir | 37 %eax = MOV32ri 1
38 %ebp = MOV32ri 2
39 %ebx = MOV32ri 3
40 %ecx = MOV32ri 4
41 %edi = MOV32ri 5
42 %edx = MOV32ri 6
66 %edx = MOV32ri 0
|
| D | sink-out-of-loop.ll | 3 ; A MOV32ri is inside a loop, it has two successors, one successor is inside the
5 ; MOV32ri outside the loop.
|
| /external/llvm/test/CodeGen/MIR/X86/ |
| D | jump-table-info.mir | 92 %eax = MOV32ri 1
96 %eax = MOV32ri 2
100 %eax = MOV32ri 4
104 %eax = MOV32ri 8
136 %eax = MOV32ri 1
140 %eax = MOV32ri 2
144 %eax = MOV32ri 4
148 %eax = MOV32ri 8
|
| D | immediate-operands.mir | 22 ; CHECK: %eax = MOV32ri 42
24 %eax = MOV32ri 42
32 ; CHECK: %eax = MOV32ri -11
34 %eax = MOV32ri -11
|
| D | undefined-jump-table-id.mir | 59 %eax = MOV32ri 1
63 %eax = MOV32ri 2
67 %eax = MOV32ri 4
71 %eax = MOV32ri 8
|
| D | jump-table-redefinition-error.mir | 62 %eax = MOV32ri 1
66 %eax = MOV32ri 2
70 %eax = MOV32ri 4
74 %eax = MOV32ri 8
|
| D | large-immediate-operand-error.mir | 16 %eax = MOV32ri 12346127502983478823754212949184914
|
| D | memory-operands.mir | 428 %eax = MOV32ri 1
432 %eax = MOV32ri 2
436 %eax = MOV32ri 4
440 %eax = MOV32ri 8
|
| /external/llvm/lib/Target/X86/ |
| D | X86WinAllocaExpander.cpp | 92 (Def->getOpcode() != X86::MOV32ri && Def->getOpcode() != X86::MOV64ri) || in getWinAllocaAmount()
|
| D | X86FrameLowering.cpp | 271 unsigned Opc = Is64Bit ? X86::MOV64ri : X86::MOV32ri; in emitSPUpdate()
1175 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX) in emitPrologue()
1190 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX) in emitPrologue()
1571 BuildMI(MBB, FirstCSPop, DL, TII.get(X86::MOV32ri), ReturnReg) in emitEpilogue()
2234 BuildMI(checkMBB, DL, TII.get(X86::MOV32ri), ScratchReg2) in adjustForSegmentedStacks()
2261 const unsigned MOVri = IsLP64 ? X86::MOV64ri : X86::MOV32ri; in adjustForSegmentedStacks()
|
| D | X86InstrCompiler.td | 277 // which only require 3 bytes compared to MOV32ri which requires 5.
302 // use MOV32ri with a SUBREG_TO_REG to represent the zero-extension, however
1029 def : Pat<(i32 (X86Wrapper tconstpool :$dst)), (MOV32ri tconstpool :$dst)>;
1030 def : Pat<(i32 (X86Wrapper tjumptable :$dst)), (MOV32ri tjumptable :$dst)>;
1031 def : Pat<(i32 (X86Wrapper tglobaltlsaddr:$dst)),(MOV32ri tglobaltlsaddr:$dst)>;
1032 def : Pat<(i32 (X86Wrapper tglobaladdr :$dst)), (MOV32ri tglobaladdr :$dst)>;
1033 def : Pat<(i32 (X86Wrapper texternalsym:$dst)), (MOV32ri texternalsym:$dst)>;
1034 def : Pat<(i32 (X86Wrapper mcsym:$dst)), (MOV32ri mcsym:$dst)>;
1035 def : Pat<(i32 (X86Wrapper tblockaddress:$dst)), (MOV32ri tblockaddress:$dst)>;
1113 def : Pat<(i32 (X86RecoverFrameAlloc mcsym:$dst)), (MOV32ri mcsym:$dst)>;
|
| D | README-SSE.txt | 147 %reg1078 = MOV32ri -3
169 %EAX = MOV32ri -3
203 It also exposes some other problems. See MOV32ri -3 and the spills.
|
| D | X86FastISel.cpp | 3513 case MVT::i32: Opc = X86::MOV32ri; break; in X86MaterializeInt()
3516 Opc = X86::MOV32ri; in X86MaterializeInt()
3524 if (VT == MVT::i64 && Opc == X86::MOV32ri) { in X86MaterializeInt()
|
| D | X86InstrInfo.cpp | 328 { X86::MOV32ri, X86::MOV32mi, TB_FOLDED_STORE }, in X86InstrInfo()
2521 BuildMI(MBB, I, DL, get(X86::MOV32ri)) in reMaterialize()
5455 MIB->setDesc(get(MIB->getOpcode() == X86::MOV32ImmSExti8 ? X86::MOV32ri in ExpandMOVImmSExti8()
5565 MI.setDesc(get(X86::MOV32ri)); in expandPostRAPseudo()
|
| /external/llvm/docs/ |
| D | MIRLangRef.rst | 366 example below shows an instance of the X86 ``MOV32ri`` instruction that has an
371 %eax = MOV32ri -42
|
| D | CodeGenerator.rst | 393 MachineInstr *MI = BuildMI(MBB, DL, TII.get(X86::MOV32ri), DestReg).addImm(42);
397 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), DestReg).addImm(42);
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | README-SSE.txt | 177 %reg1078 = MOV32ri -3
199 %EAX = MOV32ri -3
233 It also exposes some other problems. See MOV32ri -3 and the spills.
|
| D | X86InstrCompiler.td | 190 // use MOV32ri with a SUBREG_TO_REG to represent the zero-extension, however
832 def : Pat<(i32 (X86Wrapper tconstpool :$dst)), (MOV32ri tconstpool :$dst)>;
833 def : Pat<(i32 (X86Wrapper tjumptable :$dst)), (MOV32ri tjumptable :$dst)>;
834 def : Pat<(i32 (X86Wrapper tglobaltlsaddr:$dst)),(MOV32ri tglobaltlsaddr:$dst)>;
835 def : Pat<(i32 (X86Wrapper tglobaladdr :$dst)), (MOV32ri tglobaladdr :$dst)>;
836 def : Pat<(i32 (X86Wrapper texternalsym:$dst)), (MOV32ri texternalsym:$dst)>;
837 def : Pat<(i32 (X86Wrapper tblockaddress:$dst)), (MOV32ri tblockaddress:$dst)>;
|
| D | X86MCInstLower.cpp | 360 case X86::MOV64ri64i32: LowerSubReg32_Op0(OutMI, X86::MOV32ri); break; in Lower()
|
| D | X86FrameLowering.cpp | 848 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX) in emitPrologue()
|
| D | X86InstrInfo.cpp | 309 { X86::MOV32ri, X86::MOV32mi, TB_FOLDED_STORE }, in X86InstrInfo()
1288 case X86::MOV32r0: Opc = X86::MOV32ri; break; in reMaterialize()
|
| D | X86ISelLowering.cpp | 9615 const unsigned char MOV32ri = 0xB8; // X86::MOV32ri's opcode byte. in LowerINIT_TRAMPOLINE() local
9618 DAG.getConstant(MOV32ri|N86Reg, MVT::i8), in LowerINIT_TRAMPOLINE()
12283 X86::MOV32ri, X86::MOV32ri, in EmitInstrWithCustomInserter()
|
| D | X86GenDisassemblerTables.inc | 17407 "MOV32ri"
47748 0x5a9 /* MOV32ri*/
47752 0x5a9 /* MOV32ri*/
47756 0x5a9 /* MOV32ri*/
47760 0x5a9 /* MOV32ri*/
47764 0x5a9 /* MOV32ri*/
47768 0x5a9 /* MOV32ri*/
47772 0x5a9 /* MOV32ri*/
47776 0x5a9 /* MOV32ri*/
54775 0x5a9 /* MOV32ri*/
[all …]
|
| /external/llvm/test/DebugInfo/MIR/X86/ |
| D | live-debug-values.mir | 202 %edi = MOV32ri 2
|