Searched refs:MOVDDUP (Results 1 – 13 of 13) sorted by relevance
| /external/llvm/lib/Target/X86/InstPrinter/ |
| D | X86InstComments.cpp | 218 CASE_MASKZ_MOVDUP(MOVDDUP, m) in getMaskName()
219 CASE_MASKZ_MOVDUP(MOVDDUP, r) in getMaskName()
283 CASE_MASK_MOVDUP(MOVDDUP, m) in getMaskName()
284 CASE_MASK_MOVDUP(MOVDDUP, r) in getMaskName()
524 CASE_MOVDUP(MOVDDUP, r) in EmitAnyX86InstComments()
527 CASE_MOVDUP(MOVDDUP, m) in EmitAnyX86InstComments()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.h | 260 MOVDDUP, enumerator
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| D | X86InstrFragmentsSIMD.td | 133 def X86Movddup : SDNode<"X86ISD::MOVDDUP", SDTShuff1Op>;
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| D | X86ISelLowering.cpp | 2799 case X86ISD::MOVDDUP: in isTargetShuffle()
2834 case X86ISD::MOVDDUP: in getTargetShuffleNode()
4630 case X86ISD::MOVDDUP: in getShuffleScalarElt()
6273 getTargetShuffleNode(X86ISD::MOVDDUP, dl, MVT::v2f64, in getMOVDDup()
6792 return getTargetShuffleNode(X86ISD::MOVDDUP, dl, VT, V1, DAG); in LowerVECTOR_SHUFFLE()
10726 case X86ISD::MOVDDUP: return "X86ISD::MOVDDUP"; in getTargetNodeName()
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| D | X86GenFastISel.inc | 1171 // FastEmit functions for X86ISD::MOVDDUP.
1430 case X86ISD::MOVDDUP: return FastEmit_X86ISD_MOVDDUP_r(VT, RetVT, Op0, Op0IsKill);
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| D | X86InstrSSE.td | 4555 // SSE3 - Replicate Double FP - MOVDDUP
4581 defm MOVDDUP : sse3_replicate_dfp<"movddup">;
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| D | X86GenDAGISel.inc | 43866 /*SwitchOpcode*/ 101|128,3/*485*/, TARGET_VAL(X86ISD::MOVDDUP),// ->92104
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 392 MOVDDUP, enumerator
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| D | X86InstrFragmentsSIMD.td | 372 def X86Movddup : SDNode<"X86ISD::MOVDDUP", SDTShuff1Op>;
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| D | X86ISelLowering.cpp | 3810 case X86ISD::MOVDDUP: in isTargetShuffle()
4982 case X86ISD::MOVDDUP: in getTargetShuffleMask()
8549 unsigned Opcode = VT == MVT::v2f64 ? X86ISD::MOVDDUP : X86ISD::VBROADCAST; in lowerVectorShuffleAsBroadcast()
8550 bool BroadcastFromReg = (Opcode == X86ISD::MOVDDUP) || Subtarget.hasAVX2(); in lowerVectorShuffleAsBroadcast()
8635 Opcode = (BroadcastVT.is128BitVector() ? X86ISD::MOVDDUP : Opcode); in lowerVectorShuffleAsBroadcast()
8672 if (Opcode == X86ISD::MOVDDUP && !V.getValueType().isVector()) in lowerVectorShuffleAsBroadcast()
11178 return DAG.getNode(X86ISD::MOVDDUP, DL, MVT::v4f64, V1); in lowerV4F64VectorShuffle()
11786 return DAG.getNode(X86ISD::MOVDDUP, DL, MVT::v8f64, V1); in lowerV8F64VectorShuffle()
22240 case X86ISD::MOVDDUP: return "X86ISD::MOVDDUP"; in getTargetNodeName()
24769 Shuffle = X86ISD::MOVDDUP; in matchUnaryVectorShuffle()
[all …]
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| D | X86InstrSSE.td | 5097 // SSE3 - Replicate Double FP - MOVDDUP
5131 defm MOVDDUP : sse3_replicate_dfp<"movddup">;
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| D | X86InstrAVX512.td | 7452 // AVX-512 - MOVDDUP
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| /external/llvm/test/CodeGen/X86/ |
| D | vector-shuffle-combining-ssse3.ll | 8 ; Combine tests involving SSE3/SSSE3 target shuffles (MOVDDUP, MOVSHDUP, MOVSLDUP, PSHUFB)
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