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Searched refs:MOVSD (Results 1 – 19 of 19) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelLowering.h271 MOVSD, enumerator
DX86InstrFragmentsSIMD.td137 def X86Movsd : SDNode<"X86ISD::MOVSD", SDTShuff2Op>;
DX86ISelLowering.cpp2801 case X86ISD::MOVSD: in isTargetShuffle()
2882 case X86ISD::MOVSD: in getTargetShuffleNode()
4597 case X86ISD::MOVSD: { in getShuffleScalarElt()
6376 return getTargetShuffleNode(X86ISD::MOVSD, dl, VT, V1, V2, DAG); in getMOVLP()
6648 return getTargetShuffleNode(X86ISD::MOVSD, dl, VT, V1, V2, DAG); in LowerVECTOR_SHUFFLE()
10731 case X86ISD::MOVSD: return "X86ISD::MOVSD"; in getTargetNodeName()
14249 case X86ISD::MOVSD: in PerformDAGCombine()
DX86InstrInfo.td815 def MOVSD : I<0xA5, RawFrm, (outs), (ins), "movs{l|d}", []>;
1708 def : InstAlias<"movsd", (MOVSD)>;
DX86GenAsmWriter.inc1560 5913U, // MOVSD
6033 "QI2PQIrm\000MOVQxrxr\000MOVSB\000MOVSD\000MOVSDmr\000MOVSDrm\000MOVSDrr"
7224 case X86::MOVSD:
7226 // (MOVSD)
DX86GenAsmWriter1.inc1560 4577U, // MOVSD
6776 "QI2PQIrm\000MOVQxrxr\000MOVSB\000MOVSD\000MOVSDmr\000MOVSDrm\000MOVSDrr"
7967 case X86::MOVSD:
7969 // (MOVSD)
DX86GenAsmMatcher.inc3965 { X86::MOVSD, "movsd", Convert, { }, 0},
3971 { X86::MOVSD, "movsl", Convert, { }, 0},
DX86GenInstrInfo.inc1563 MOVSD = 1547,
5731 …47, 0, 0, 0, 0, "MOVSD", 0|(1<<MCID::UnmodeledSideEffects), 0x14a000001ULL, ImplicitList39, Implic…
DX86InstrSSE.td470 // MOVSD to the lower bits.
496 // Shuffle with MOVSD
DX86GenDisassemblerTables.inc18583 "MOVSD"
47672 0x60b /* MOVSD*/
54699 0x60b /* MOVSD*/
69021 0x60b /* MOVSD*/
76186 0x60b /* MOVSD*/
97256 0x60b /* MOVSD*/
104275 0x60b /* MOVSD*/
DX86GenDAGISel.inc46612 /*SwitchOpcode*/ 1|128,2/*257*/, TARGET_VAL(X86ISD::MOVSD),// ->97597
/external/valgrind/docs/internals/
D3_3_BUGSTATUS.txt222 171645 Fixd vx1869 Unrecognised instruction (MOVSD, non-binutils
/external/llvm/lib/Target/X86/
DX86ISelLowering.h400 MOVSD, enumerator
DX86InstrFragmentsSIMD.td376 def X86Movsd : SDNode<"X86ISD::MOVSD", SDTShuff2Op>;
DX86IntrinsicsInfo.h809 X86ISD::MOVSD, 0),
DX86ISelLowering.cpp3812 case X86ISD::MOVSD: in isTargetShuffle()
3862 case X86ISD::MOVSD: in getTargetShuffleNode()
4966 case X86ISD::MOVSD: in getTargetShuffleMask()
8443 return DAG.getNode(EltVT == MVT::f32 ? X86ISD::MOVSS : X86ISD::MOVSD, DL, in lowerVectorShuffleAsElementInsertion()
8959 isShuffleFoldableLoad(V1S) ? X86ISD::MOVLPD : X86ISD::MOVSD, in lowerV2F64VectorShuffle()
20139 TargetOpcode = X86ISD::MOVSD; in LowerShift()
20150 TargetOpcode = X86ISD::MOVSD; in LowerShift()
20170 if (TargetOpcode == X86ISD::MOVSD) in LowerShift()
22243 case X86ISD::MOVSD: return "X86ISD::MOVSD"; in getTargetNodeName()
31012 case X86ISD::MOVSD: in PerformDAGCombine()
DX86InstrSSE.td570 defm MOVSD : sse12_move<FR64, X86Movsd, v2f64, f64mem, "movsd",
578 defm MOVSD : sse12_move_rm<FR64, f64mem, loadf64, "movsd",
717 // MOVSD to the lower bits.
736 // Shuffle with MOVSD
DX86InstrAVX512.td2988 // AVX-512 MOVSS, MOVSD
/external/valgrind/
DNEWS3525 171645 Unrecognised instruction (MOVSD, non-binutils encoding)