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Searched refs:MRM3m (Results 1 – 25 of 26) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h219 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, // Format /0 /1 /2 /3 enumerator
496 case X86II::MRM2m: case X86II::MRM3m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp544 case X86II::MRM2m: case X86II::MRM3m: in EmitVEXOpcodePrefix()
679 case X86II::MRM2m: case X86II::MRM3m: in DetermineREXPrefix()
976 case X86II::MRM2m: case X86II::MRM3m: in EncodeInstruction()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrShiftRotate.td377 def RCR8m1 : I<0xD0, MRM3m, (outs), (ins i8mem:$dst),
379 def RCR8mi : Ii8<0xC0, MRM3m, (outs), (ins i8mem:$dst, i8imm:$cnt),
381 def RCR16m1 : I<0xD1, MRM3m, (outs), (ins i16mem:$dst),
383 def RCR16mi : Ii8<0xC1, MRM3m, (outs), (ins i16mem:$dst, i8imm:$cnt),
385 def RCR32m1 : I<0xD1, MRM3m, (outs), (ins i32mem:$dst),
387 def RCR32mi : Ii8<0xC1, MRM3m, (outs), (ins i32mem:$dst, i8imm:$cnt),
389 def RCR64m1 : RI<0xD1, MRM3m, (outs), (ins i64mem:$dst),
391 def RCR64mi : RIi8<0xC1, MRM3m, (outs), (ins i64mem:$dst, i8imm:$cnt),
404 def RCR8mCL : I<0xD2, MRM3m, (outs), (ins i8mem:$dst),
406 def RCR16mCL : I<0xD3, MRM3m, (outs), (ins i16mem:$dst),
[all …]
DX86InstrFPStack.td276 def FCOMP32m : FPI<0xD8, MRM3m, (outs), (ins f32mem:$src), "fcomp{s}\t$src">;
282 def FICOMP32m: FPI<0xDA, MRM3m, (outs), (ins i32mem:$src), "ficomp{l}\t$src">;
285 def FCOMP64m : FPI<0xDC, MRM3m, (outs), (ins f64mem:$src), "fcomp{l}\t$src">;
292 def FICOMP16m: FPI<0xDE, MRM3m, (outs), (ins i16mem:$src), "ficomp{s}\t$src">;
429 def ST_FP32m : FPI<0xD9, MRM3m, (outs), (ins f32mem:$dst), "fstp{s}\t$dst">;
430 def ST_FP64m : FPI<0xDD, MRM3m, (outs), (ins f64mem:$dst), "fstp{l}\t$dst">;
434 def IST_FP16m : FPI<0xDF, MRM3m, (outs), (ins i16mem:$dst), "fistp{s}\t$dst">;
435 def IST_FP32m : FPI<0xDB, MRM3m, (outs), (ins i32mem:$dst), "fistp{l}\t$dst">;
DX86InstrControl.td163 def FARCALL16m : I<0xFF, MRM3m, (outs), (ins opaque32mem:$dst),
165 def FARCALL32m : I<0xFF, MRM3m, (outs), (ins opaque48mem:$dst),
236 def FARCALL64 : RI<0xFF, MRM3m, (outs), (ins opaque80mem:$dst),
DX86InstrSystem.td228 def LTRm : I<0x00, MRM3m, (outs), (ins i16mem:$src),
364 def LIDT16m : I<0x01, MRM3m, (outs), (ins opaque48mem:$src),
366 def LIDTm : I<0x01, MRM3m, (outs), (ins opaque48mem:$src),
DX86CodeEmitter.cpp207 case X86II::MRM2m: case X86II::MRM3m: in determineREX()
937 case X86II::MRM2m: case X86II::MRM3m: in emitInstruction()
DX86InstrArithmetic.td329 def NEG8m : I<0xF6, MRM3m, (outs), (ins i8mem :$dst),
333 def NEG16m : I<0xF7, MRM3m, (outs), (ins i16mem:$dst),
337 def NEG32m : I<0xF7, MRM3m, (outs), (ins i32mem:$dst),
341 def NEG64m : RI<0xF7, MRM3m, (outs), (ins i64mem:$dst), "neg{q}\t$dst",
1102 defm SBB : ArithBinOp_RFF<0x18, 0x1A, 0x1C, "sbb", MRM3r, MRM3m, X86sbb_flag,
DX86InstrFormats.td29 def MRM3m : Format<27>; def MRM4m : Format<28>; def MRM5m : Format<29>;
DX86InstrSSE.td3177 def PREFETCHT2 : PSI<0x18, MRM3m, (outs), (ins i8mem:$src),
3209 def VSTMXCSR : VPSI<0xAE, MRM3m, (outs), (ins i32mem:$dst),
3214 def STMXCSR : PSI<0xAE, MRM3m, (outs), (ins i32mem:$dst),
/external/llvm/lib/Target/X86/
DX86InstrShiftRotate.td429 def RCR8m1 : I<0xD0, MRM3m, (outs), (ins i8mem:$dst),
431 def RCR8mi : Ii8<0xC0, MRM3m, (outs), (ins i8mem:$dst, u8imm:$cnt),
433 def RCR16m1 : I<0xD1, MRM3m, (outs), (ins i16mem:$dst),
435 def RCR16mi : Ii8<0xC1, MRM3m, (outs), (ins i16mem:$dst, u8imm:$cnt),
437 def RCR32m1 : I<0xD1, MRM3m, (outs), (ins i32mem:$dst),
439 def RCR32mi : Ii8<0xC1, MRM3m, (outs), (ins i32mem:$dst, u8imm:$cnt),
441 def RCR64m1 : RI<0xD1, MRM3m, (outs), (ins i64mem:$dst),
443 def RCR64mi : RIi8<0xC1, MRM3m, (outs), (ins i64mem:$dst, u8imm:$cnt),
456 def RCR8mCL : I<0xD2, MRM3m, (outs), (ins i8mem:$dst),
458 def RCR16mCL : I<0xD3, MRM3m, (outs), (ins i16mem:$dst),
[all …]
DX86InstrFPStack.td326 def FCOMP32m : FPI<0xD8, MRM3m, (outs), (ins f32mem:$src), "fcomp{s}\t$src">;
332 def FICOMP32m: FPI<0xDA, MRM3m, (outs), (ins i32mem:$src), "ficomp{l}\t$src">;
335 def FCOMP64m : FPI<0xDC, MRM3m, (outs), (ins f64mem:$src), "fcomp{l}\t$src">;
342 def FICOMP16m: FPI<0xDE, MRM3m, (outs), (ins i16mem:$src), "ficomp{s}\t$src">;
488 def ST_FP32m : FPI<0xD9, MRM3m, (outs), (ins f32mem:$dst), "fstp{s}\t$dst",
490 def ST_FP64m : FPI<0xDD, MRM3m, (outs), (ins f64mem:$dst), "fstp{l}\t$dst",
498 def IST_FP16m : FPI<0xDF, MRM3m, (outs), (ins i16mem:$dst), "fistp{s}\t$dst",
500 def IST_FP32m : FPI<0xDB, MRM3m, (outs), (ins i32mem:$dst), "fistp{l}\t$dst",
DX86InstrSystem.td256 def LTRm : I<0x00, MRM3m, (outs), (ins i16mem:$src),
424 def LIDT16m : I<0x01, MRM3m, (outs), (ins opaque48mem:$src),
426 def LIDT32m : I<0x01, MRM3m, (outs), (ins opaque48mem:$src),
428 def LIDT64m : I<0x01, MRM3m, (outs), (ins opaque80mem:$src),
525 def XRSTORS : I<0xC7, MRM3m, (outs), (ins opaque512mem:$dst),
528 def XRSTORS64 : RI<0xC7, MRM3m, (outs), (ins opaque512mem:$dst),
DX86InstrControl.td232 def FARCALL16m : I<0xFF, MRM3m, (outs), (ins opaque32mem:$dst),
235 def FARCALL32m : I<0xFF, MRM3m, (outs), (ins opaque48mem:$dst),
292 def FARCALL64 : RI<0xFF, MRM3m, (outs), (ins opaque80mem:$dst),
DX86InstrArithmetic.td396 def NEG8m : I<0xF6, MRM3m, (outs), (ins i8mem :$dst),
400 def NEG16m : I<0xF7, MRM3m, (outs), (ins i16mem:$dst),
404 def NEG32m : I<0xF7, MRM3m, (outs), (ins i32mem:$dst),
408 def NEG64m : RI<0xF7, MRM3m, (outs), (ins i64mem:$dst), "neg{q}\t$dst",
1207 defm SBB : ArithBinOp_RFF<0x18, 0x1A, 0x1C, "sbb", MRM3r, MRM3m, X86sbb_flag,
DX86InstrInfo.td2224 defm BLSI32 : bmi_bls<"blsi{l}", MRM3r, MRM3m, GR32, i32mem>;
2225 defm BLSI64 : bmi_bls<"blsi{q}", MRM3r, MRM3m, GR64, i64mem>, VEX_W;
2400 defm BLCS : tbm_binary_intr<0x01, "blcs", MRM3r, MRM3m>;
DX86InstrFormats.td34 def MRM3m : Format<27>; def MRM4m : Format<28>; def MRM5m : Format<29>;
DX86InstrSSE.td3654 def PREFETCHT2 : I<0x18, MRM3m, (outs), (ins i8mem:$src),
3702 def VSTMXCSR : VPSI<0xAE, MRM3m, (outs), (ins i32mem:$dst),
3710 def STMXCSR : I<0xAE, MRM3m, (outs), (ins i32mem:$dst),
/external/swiftshader/third_party/LLVM/utils/TableGen/
DX86RecognizableInstr.cpp53 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, enumerator
751 case X86Local::MRM3m: in emitInstructionSpecifier()
832 case X86Local::MRM3m: in emitDecodePath()
921 case X86Local::MRM3m: in emitDecodePath()
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h299 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, // Format /0 /1 /2 /3 enumerator
692 case X86II::MRM2m: case X86II::MRM3m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp783 case X86II::MRM2m: case X86II::MRM3m: in EmitVEXOpcodePrefix()
1013 case X86II::MRM2m: case X86II::MRM3m: in DetermineREXPrefix()
1372 case X86II::MRM2m: case X86II::MRM3m: in encodeInstruction()
/external/llvm/utils/TableGen/
DX86RecognizableInstr.cpp110 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, enumerator
743 case X86Local::MRM3m: in emitInstructionSpecifier()
859 case X86Local::MRM2m: case X86Local::MRM3m: in emitDecodePath()
/external/llvm/test/TableGen/
DTargetInstrInfo.td56 def MRM3m : Format<27>; def MRM4m : Format<28>; def MRM5m : Format<29>;
/external/swiftshader/third_party/LLVM/test/TableGen/
DTargetInstrInfo.td56 def MRM3m : Format<27>; def MRM4m : Format<28>; def MRM5m : Format<29>;
/external/llvm/docs/
DWritingAnLLVMBackend.rst1825 case X86II::MRM2m: case X86II::MRM3m: // a MEMORY r/m operand and

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