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Searched refs:MachineInstrBuilder (Results 1 – 25 of 128) sorted by relevance

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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DMachineInstrBuilder.h42 class MachineInstrBuilder {
45 MachineInstrBuilder() : MI(0) {} in MachineInstrBuilder() function
46 explicit MachineInstrBuilder(MachineInstr *mi) : MI(mi) {} in MachineInstrBuilder() function
57 MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
75 const MachineInstrBuilder &addImm(int64_t Val) const { in addImm()
80 const MachineInstrBuilder &addCImm(const ConstantInt *Val) const { in addCImm()
85 const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const { in addFPImm()
90 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
96 const MachineInstrBuilder &addFrameIndex(int Idx) const { in addFrameIndex()
101 const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx,
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/external/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h47 class MachineInstrBuilder {
51 MachineInstrBuilder() : MF(nullptr), MI(nullptr) {} in MachineInstrBuilder() function
55 MachineInstrBuilder(MachineFunction &F, MachineInstr *I) : MF(&F), MI(I) {} in MachineInstrBuilder() function
56 MachineInstrBuilder(MachineFunction &F, MachineBasicBlock::iterator I) in MachineInstrBuilder() function
69 const MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
87 const MachineInstrBuilder &addImm(int64_t Val) const { in addImm()
92 const MachineInstrBuilder &addCImm(const ConstantInt *Val) const { in addCImm()
97 const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const { in addFPImm()
102 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
108 const MachineInstrBuilder &addFrameIndex(int Idx) const { in addFrameIndex()
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/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
DSystemZInstrBuilder.h58 static inline const MachineInstrBuilder &
59 addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg) { in addDirectMem()
65 static inline const MachineInstrBuilder &
66 addOffset(const MachineInstrBuilder &MIB, int Offset) { in addOffset()
74 static inline const MachineInstrBuilder &
75 addRegOffset(const MachineInstrBuilder &MIB, in addRegOffset()
82 static inline const MachineInstrBuilder &
83 addRegReg(const MachineInstrBuilder &MIB, in addRegReg()
89 static inline const MachineInstrBuilder &
90 addFullAddress(const MachineInstrBuilder &MIB, const SystemZAddressMode &AM) { in addFullAddress()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrBuilder.h90 static inline const MachineInstrBuilder &
91 addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg) { in addDirectMem()
98 static inline const MachineInstrBuilder &
99 addOffset(const MachineInstrBuilder &MIB, int Offset) { in addOffset()
107 static inline const MachineInstrBuilder &
108 addRegOffset(const MachineInstrBuilder &MIB, in addRegOffset()
115 static inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB, in addRegReg()
122 static inline const MachineInstrBuilder &
123 addFullAddress(const MachineInstrBuilder &MIB, in addFullAddress()
148 static inline const MachineInstrBuilder &
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/external/llvm/lib/Target/X86/
DX86InstrBuilder.h118 static inline const MachineInstrBuilder &
119 addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg) { in addDirectMem()
126 static inline const MachineInstrBuilder &
127 addOffset(const MachineInstrBuilder &MIB, int Offset) { in addOffset()
135 static inline const MachineInstrBuilder &
136 addRegOffset(const MachineInstrBuilder &MIB, in addRegOffset()
143 static inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB, in addRegReg()
150 static inline const MachineInstrBuilder &
151 addFullAddress(const MachineInstrBuilder &MIB, in addFullAddress()
176 static inline const MachineInstrBuilder &
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DX86ExpandPseudo.cpp112 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op)); in ExpandMI()
125 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op)); in ExpandMI()
171 MachineInstrBuilder MIB; in ExpandMI()
DX86FrameLowering.h21 class MachineInstrBuilder; variable
210 MachineInstrBuilder BuildStackAdjustment(MachineBasicBlock &MBB,
/external/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.h25 class MachineInstrBuilder; variable
52 MachineInstrBuilder &MIB,
65 void AddRegisterOperand(MachineInstrBuilder &MIB,
76 void AddOperand(MachineInstrBuilder &MIB,
DInstrEmitter.cpp208 MachineInstrBuilder &MIB, in CreateVirtualRegisters()
312 InstrEmitter::AddRegisterOperand(MachineInstrBuilder &MIB, in AddRegisterOperand()
375 void InstrEmitter::AddOperand(MachineInstrBuilder &MIB, in AddOperand()
558 MachineInstrBuilder MIB = in EmitSubregNode()
615 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), II, NewVReg); in EmitRegSequence()
671 MachineInstrBuilder MIB = BuildMI(*MF, DL, II); in EmitDbgValue()
786 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), II); in EmitMachineNode()
942 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), in EmitSpecialNode()
/external/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h201 const MachineInstrBuilder &AddDReg(MachineInstrBuilder &MIB, unsigned Reg,
399 const MachineInstrBuilder &AddDefaultPred(const MachineInstrBuilder &MIB) { in AddDefaultPred()
404 const MachineInstrBuilder &AddDefaultCC(const MachineInstrBuilder &MIB) { in AddDefaultCC()
409 const MachineInstrBuilder &AddDefaultT1CC(const MachineInstrBuilder &MIB,
415 const MachineInstrBuilder &AddNoT1CC(const MachineInstrBuilder &MIB) { in AddNoT1CC()
DARMExpandPseudoInsts.cpp65 MachineInstrBuilder &UseMI, MachineInstrBuilder &DefMI);
92 MachineInstrBuilder &UseMI, in TransferImpOps()
93 MachineInstrBuilder &DefMI) { in TransferImpOps()
401 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandVLD()
466 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandVST()
520 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandLaneOp()
604 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc)); in ExpandVTBL()
675 MachineInstrBuilder LO16, HI16; in ExpandMOV32BitImm()
792 MachineInstrBuilder MIB = in ExpandCMP_SWAP()
809 MachineInstrBuilder MIB; in ExpandCMP_SWAP()
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DThumbRegisterInfo.cpp164 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg); in emitThumbRegPlusImmInReg()
304 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(CopyOpc), DestReg); in emitThumbRegPlusImmediate()
321 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(ExtraOpc), DestReg); in emitThumbRegPlusImmediate()
359 MachineInstrBuilder MIB(*MBB.getParent(), &MI); in rewriteFrameIndex()
510 MachineInstrBuilder MIB(*MBB.getParent(), &MI); in eliminateFrameIndex()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMBaseInstrInfo.h294 const MachineInstrBuilder &AddDefaultPred(const MachineInstrBuilder &MIB) { in AddDefaultPred()
299 const MachineInstrBuilder &AddDefaultCC(const MachineInstrBuilder &MIB) { in AddDefaultCC()
304 const MachineInstrBuilder &AddDefaultT1CC(const MachineInstrBuilder &MIB,
310 const MachineInstrBuilder &AddNoT1CC(const MachineInstrBuilder &MIB) { in AddNoT1CC()
DThumb1RegisterInfo.cpp129 MachineInstrBuilder MIB = in emitThumbRegPlusImmInReg()
241 const MachineInstrBuilder MIB = in emitThumbRegPlusImmediate()
260 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg); in emitThumbRegPlusImmediate()
268 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg); in emitThumbRegPlusImmediate()
419 MachineInstrBuilder MIB(&MI); in rewriteFrameIndex()
430 MachineInstrBuilder MIB(&MI); in rewriteFrameIndex()
459 MachineInstrBuilder MIB(&MI); in rewriteFrameIndex()
703 MachineInstrBuilder MIB(&MI); in eliminateFrameIndex()
DARMExpandPseudoInsts.cpp56 MachineInstrBuilder &UseMI, MachineInstrBuilder &DefMI);
74 MachineInstrBuilder &UseMI, in TransferImpOps()
75 MachineInstrBuilder &DefMI) { in TransferImpOps()
417 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandVLD()
481 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandVST()
530 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandLaneOp()
612 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc)); in ExpandVTBL()
653 MachineInstrBuilder LO16, HI16; in ExpandMOV32BitImm()
871 MachineInstrBuilder MIB = in ExpandMI()
883 MachineInstrBuilder MIB = in ExpandMI()
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/external/llvm/lib/Target/AArch64/
DAArch64ExpandPseudoInsts.cpp71 static void transferImpOps(MachineInstr &OldMI, MachineInstrBuilder &UseMI, in transferImpOps()
72 MachineInstrBuilder &DefMI) { in transferImpOps()
119 MachineInstrBuilder MIB = in tryOrrMovk()
129 MachineInstrBuilder MIB1 = in tryOrrMovk()
186 MachineInstrBuilder MIB = in tryToreplicateChunks()
206 MachineInstrBuilder MIB1 = in tryToreplicateChunks()
231 MachineInstrBuilder MIB2 = in tryToreplicateChunks()
369 MachineInstrBuilder MIB = in trySequenceOfOnes()
380 MachineInstrBuilder MIB1 = in trySequenceOfOnes()
397 MachineInstrBuilder MIB2 = in trySequenceOfOnes()
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/external/llvm/lib/Target/AMDGPU/
DR600InstrInfo.h26 class MachineInstrBuilder; variable
38 MachineInstrBuilder buildIndirectRead(MachineBasicBlock *MBB,
44 MachineInstrBuilder buildIndirectWrite(MachineBasicBlock *MBB,
243 MachineInstrBuilder buildIndirectWrite(MachineBasicBlock *MBB,
251 MachineInstrBuilder buildIndirectRead(MachineBasicBlock *MBB,
265 MachineInstrBuilder buildDefaultInstruction(MachineBasicBlock &MBB,
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUInstrBuilder.h32 inline const MachineInstrBuilder&
33 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0,
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCInstrBuilder.h32 static inline const MachineInstrBuilder&
33 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0,
/external/llvm/lib/Target/PowerPC/
DPPCInstrBuilder.h32 static inline const MachineInstrBuilder&
33 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0,
/external/llvm/lib/CodeGen/GlobalISel/
DMachineIRBuilder.cpp81 MachineInstrBuilder(getMF(), NewMI) in buildInstr()
91 MachineInstrBuilder(getMF(), NewMI).addReg(Res, RegState::Define).addReg(Op0); in buildInstr()
102 MachineInstrBuilder(getMF(), NewMI).addMBB(&BB); in buildInstr()
/external/llvm/lib/Target/SystemZ/
DSystemZInstrBuilder.h26 static inline const MachineInstrBuilder &
27 addFrameReference(const MachineInstrBuilder &MIB, int FI) { in addFrameReference()
DSystemZInstrInfo.cpp175 MachineInstrBuilder(MF, Ear1MI).addImm(0); in expandLoadStackGuard()
181 MachineInstrBuilder(MF, SllgMI).addReg(Reg).addReg(0).addImm(32); in expandLoadStackGuard()
187 MachineInstrBuilder(MF, Ear2MI).addImm(1); in expandLoadStackGuard()
191 MachineInstrBuilder(MF, MI).addReg(Reg).addImm(40).addReg(0); in expandLoadStackGuard()
601 MachineInstrBuilder(*MI.getParent()->getParent(), MI) in PredicateInstruction()
611 MachineInstrBuilder(*MI.getParent()->getParent(), MI) in PredicateInstruction()
620 MachineInstrBuilder(*MI.getParent()->getParent(), MI) in PredicateInstruction()
627 MachineInstrBuilder(*MI.getParent()->getParent(), MI) in PredicateInstruction()
638 MachineInstrBuilder(*MI.getParent()->getParent(), MI) in PredicateInstruction()
649 MachineInstrBuilder(*MI.getParent()->getParent(), MI) in PredicateInstruction()
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/external/llvm/lib/Target/Mips/
DMips16InstrInfo.cpp82 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc)); in copyPhysReg()
169 static void addSaveRestoreRegs(MachineInstrBuilder &MIB, in addSaveRestoreRegs()
202 MachineInstrBuilder MIB; in makeFrame()
232 MachineInstrBuilder MIB; in restoreFrame()
272 MachineInstrBuilder MIB1 = BuildMI(MBB, I, DL, get(Mips::LwConstant32), Reg1); in adjustStackPtrBig()
274 MachineInstrBuilder MIB2 = BuildMI(MBB, I, DL, get(Mips::MoveR3216), Reg2); in adjustStackPtrBig()
276 MachineInstrBuilder MIB3 = BuildMI(MBB, I, DL, get(Mips::AdduRxRyRz16), Reg1); in adjustStackPtrBig()
279 MachineInstrBuilder MIB4 = BuildMI(MBB, I, DL, get(Mips::Move32R16), in adjustStackPtrBig()
/external/llvm/lib/CodeGen/
DMachineSSAUpdater.cpp113 MachineInstrBuilder InsertNewDef(unsigned Opcode, in InsertNewDef()
187 MachineInstrBuilder InsertedPHI = InsertNewDef(TargetOpcode::PHI, BB, in GetValueInMiddleOfBlock()
309 MachineInstrBuilder(*Pred->getParent(), PHI).addReg(Val).addMBB(Pred); in AddPHIOperand()

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