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Searched refs:Mask0Imm (Results 1 – 2 of 2) sorted by relevance

/external/llvm/test/CodeGen/AArch64/
Dbitfield-insert.ll315 ; The next set of tests generate a BFXIL from 'or (and X, Mask0Imm),
316 ; (and Y, Mask1Imm)' iff Mask0Imm and ~Mask1Imm are equivalent and one of the
/external/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp2251 uint64_t Mask0Imm, Mask1Imm; in tryBitfieldInsertOpFromOr() local
2255 isOpcWithIntImmediate(And0.getNode(), ISD::AND, Mask0Imm) && in tryBitfieldInsertOpFromOr()
2257 APInt(BitWidth, Mask0Imm) == ~APInt(BitWidth, Mask1Imm) && in tryBitfieldInsertOpFromOr()
2258 (isShiftedMask(Mask0Imm, VT) || isShiftedMask(Mask1Imm, VT))) { in tryBitfieldInsertOpFromOr()
2263 if (isShiftedMask(Mask0Imm, VT)) { in tryBitfieldInsertOpFromOr()
2265 std::swap(Mask0Imm, Mask1Imm); in tryBitfieldInsertOpFromOr()
2271 int Width = BitWidth - APInt(BitWidth, Mask0Imm).countPopulation(); in tryBitfieldInsertOpFromOr()