| /external/swiftshader/third_party/LLVM/lib/Analysis/ |
| D | ValueTracking.cpp | 159 APInt Mask2(Mask & ~KnownZero); in ComputeMaskedBits() local
160 ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero2, KnownOne2, TD, in ComputeMaskedBits()
173 APInt Mask2(Mask & ~KnownOne); in ComputeMaskedBits() local
174 ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero2, KnownOne2, TD, in ComputeMaskedBits()
200 APInt Mask2 = APInt::getAllOnesValue(BitWidth); in ComputeMaskedBits() local
201 ComputeMaskedBits(I->getOperand(1), Mask2, KnownZero, KnownOne, TD,Depth+1); in ComputeMaskedBits()
202 ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero2, KnownOne2, TD, in ComputeMaskedBits()
330 APInt Mask2(Mask.lshr(ShiftAmt)); in ComputeMaskedBits() local
331 ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero, KnownOne, TD, in ComputeMaskedBits()
347 APInt Mask2(Mask.shl(ShiftAmt)); in ComputeMaskedBits() local
[all …]
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| /external/vulkan-validation-layers/libs/glm/detail/ |
| D | intrinsic_integer.inl | 36 __m128i const Mask2 = _mm_set1_epi32(0x0F0F0F0F); local
64 Reg1 = _mm_and_si128(Reg1, Mask2);
90 __m128i const Mask2 = _mm_set1_epi32(0x0F0F0F0F); local
117 Reg1 = _mm_and_si128(Reg1, Mask2);
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| /external/llvm/test/tools/llvm-readobj/ |
| D | mips-reginfo.test | 8 CHECK-NEXT: Co-Proc Mask2: 0x0
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| D | mips-options-sec.test | 9 CHECK-NEXT: Co-Proc Mask2: 0x0
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| /external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/ |
| D | InstCombineSimplifyDemanded.cpp | 694 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); in SimplifyDemandedUseBits() local
695 if (SimplifyDemandedBits(I->getOperandUse(0), Mask2, in SimplifyDemandedUseBits()
720 APInt Mask2 = APInt::getSignBit(BitWidth); in SimplifyDemandedUseBits() local
722 ComputeMaskedBits(I->getOperand(0), Mask2, LHSKnownZero, LHSKnownOne, in SimplifyDemandedUseBits()
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 966 unsigned Mask2 = RegInfo.createVirtualRegister(RC); in EmitAtomicBinaryPartword() local
1025 BuildMI(BB, dl, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask); in EmitAtomicBinaryPartword()
1069 .addReg(OldVal).addReg(Mask2); in EmitAtomicBinaryPartword()
1187 unsigned Mask2 = RegInfo.createVirtualRegister(RC); in EmitAtomicCmpSwapPartword() local
1253 BuildMI(BB, dl, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask); in EmitAtomicCmpSwapPartword()
1281 .addReg(OldVal).addReg(Mask2); in EmitAtomicCmpSwapPartword()
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| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineSimplifyDemanded.cpp | 685 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); in SimplifyDemandedUseBits() local
686 if (SimplifyDemandedBits(I->getOperandUse(0), Mask2, LHSKnownZero, in SimplifyDemandedUseBits()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 1668 APInt Mask2 = APInt::getAllOnesValue(BitWidth); in ComputeMaskedBits() local
1669 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); in ComputeMaskedBits()
1670 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); in ComputeMaskedBits()
1986 APInt Mask2 = APInt::getLowBitsSet(BitWidth, in ComputeMaskedBits() local
1988 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); in ComputeMaskedBits()
1992 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); in ComputeMaskedBits()
2015 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); in ComputeMaskedBits() local
2016 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); in ComputeMaskedBits()
2044 APInt Mask2 = LowBits & Mask; in ComputeMaskedBits() local
2046 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); in ComputeMaskedBits()
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| /external/llvm/lib/Transforms/Vectorize/ |
| D | BBVectorize.cpp | 2854 std::vector<Constant *> Mask1(numElemI), Mask2(numElemI); in replaceOutputsOfPair() local
2857 Mask2[v] = ConstantInt::get(Type::getInt32Ty(Context), numElemJ + v); in replaceOutputsOfPair()
2869 std::vector<Constant *> Mask1(numElemJ), Mask2(numElemJ); in replaceOutputsOfPair() local
2872 Mask2[v] = ConstantInt::get(Type::getInt32Ty(Context), numElemI + v); in replaceOutputsOfPair()
2876 ConstantVector::get(Mask2), in replaceOutputsOfPair()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 3148 SDValue Mask2 = DAG.getConstant(0x7fffffff, MVT::i32); in LowerFCOPYSIGN() local
3152 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); in LowerFCOPYSIGN()
3161 SDValue Hi = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp0.getValue(1), Mask2); in LowerFCOPYSIGN()
6824 unsigned Mask2 = N11C->getZExtValue(); in PerformORCombine() local
6829 (Mask == ~Mask2)) { in PerformORCombine()
6836 unsigned amt = CountTrailingZeros_32(Mask2); in PerformORCombine()
6845 (~Mask == Mask2)) { in PerformORCombine()
6849 (Mask2 == 0xffff || Mask2 == 0xffff0000)) in PerformORCombine()
6856 DAG.getConstant(Mask2, MVT::i32)); in PerformORCombine()
6897 unsigned Mask2 = N11C->getZExtValue(); in PerformBFICombine() local
[all …]
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 1248 unsigned Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() local
1323 BuildMI(BB, DL, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask); in emitAtomicBinaryPartword()
1366 .addReg(OldVal).addReg(Mask2); in emitAtomicBinaryPartword()
1503 unsigned Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() local
1586 BuildMI(BB, DL, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask); in emitAtomicCmpSwapPartword()
1614 .addReg(OldVal).addReg(Mask2); in emitAtomicCmpSwapPartword()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 4306 SDValue Mask2 = DAG.getConstant(0x7fffffff, dl, MVT::i32); in LowerFCOPYSIGN() local
4310 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); in LowerFCOPYSIGN()
4319 SDValue Hi = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp0.getValue(1), Mask2); in LowerFCOPYSIGN()
9400 unsigned Mask2 = N11C->getZExtValue(); in PerformORCombine() local
9405 (Mask == ~Mask2)) { in PerformORCombine()
9412 unsigned amt = countTrailingZeros(Mask2); in PerformORCombine()
9421 (~Mask == Mask2)) { in PerformORCombine()
9425 (Mask2 == 0xffff || Mask2 == 0xffff0000)) in PerformORCombine()
9432 DAG.getConstant(Mask2, DL, MVT::i32)); in PerformORCombine()
9570 unsigned Mask2 = N11C->getZExtValue(); in PerformBFICombine() local
[all …]
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringX86BaseImpl.h | 4000 const unsigned char Mask2[3] = {227, 196, 52};
4003 Constant *Mask2Constant = Ctx->getConstantInt32(Mask2[Index - 1]);
8348 Constant *Mask2 =
8361 Func, MemOperand->getType(), RegTemp, Mask2, MemOperand->getIndex(),
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 6056 SmallVector<int, 8> Mask2(4U, -1); in LowerVECTOR_SHUFFLE_128v4() local
6064 Mask2[i] = Idx; in LowerVECTOR_SHUFFLE_128v4()
6068 return DAG.getVectorShuffle(VT, dl, V1, V1, &Mask2[0]); in LowerVECTOR_SHUFFLE_128v4()
8129 SDValue Mask2 = DAG.getLoad(VT, dl, DAG.getEntryNode(), CPIdx, in LowerFCOPYSIGN() local
8132 SDValue Val = DAG.getNode(X86ISD::FAND, dl, VT, Op0, Mask2); in LowerFCOPYSIGN()
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