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Searched refs:MayStore (Results 1 – 8 of 8) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86GenInstrInfo.inc4206 …{ 22, 6, 1, 0, 0, "ACQUIRE_MOV16rm", 0|(1<<MCID::MayLoad)|(1<<MCID::MayStore), 0x0ULL, NULL, NULL,…
4207 …{ 23, 6, 1, 0, 0, "ACQUIRE_MOV32rm", 0|(1<<MCID::MayLoad)|(1<<MCID::MayStore), 0x0ULL, NULL, NULL,…
4208 …{ 24, 6, 1, 0, 0, "ACQUIRE_MOV64rm", 0|(1<<MCID::MayLoad)|(1<<MCID::MayStore), 0x0ULL, NULL, NULL,…
4209 …{ 25, 6, 1, 0, 0, "ACQUIRE_MOV8rm", 0|(1<<MCID::MayLoad)|(1<<MCID::MayStore), 0x0ULL, NULL, NULL, …
4211 …{ 27, 6, 0, 0, 0, "ADC16mi", 0|(1<<MCID::MayLoad)|(1<<MCID::MayStore), 0x10200c05aULL, ImplicitLis…
4212 …{ 28, 6, 0, 0, 0, "ADC16mi8", 0|(1<<MCID::MayLoad)|(1<<MCID::MayStore), 0x10600405aULL, ImplicitLi…
4213 …{ 29, 6, 0, 0, 0, "ADC16mr", 0|(1<<MCID::MayLoad)|(1<<MCID::MayStore), 0x22000044ULL, ImplicitList…
4220 …{ 36, 6, 0, 0, 0, "ADC32mi", 0|(1<<MCID::MayLoad)|(1<<MCID::MayStore), 0x10201401aULL, ImplicitLis…
4221 …{ 37, 6, 0, 0, 0, "ADC32mi8", 0|(1<<MCID::MayLoad)|(1<<MCID::MayStore), 0x10600401aULL, ImplicitLi…
4222 …{ 38, 6, 0, 0, 0, "ADC32mr", 0|(1<<MCID::MayLoad)|(1<<MCID::MayStore), 0x22000004ULL, ImplicitList…
[all …]
/external/swiftshader/third_party/LLVM/include/llvm/MC/
DMCInstrDesc.h113 MayStore, enumerator
420 return Flags & (1 << MCID::MayStore); in mayStore()
/external/llvm/include/llvm/MC/
DMCInstrDesc.h114 MayStore, enumerator
356 bool mayStore() const { return Flags & (1 << MCID::MayStore); } in mayStore()
/external/llvm/lib/Target/Mips/
DMipsDelaySlotFiller.cpp175 bool updateDefsUses(ValueType V, bool MayStore);
490 bool MemDefsUses::updateDefsUses(ValueType V, bool MayStore) { in updateDefsUses() argument
491 if (MayStore) in updateDefsUses()
DMips16InstrInfo.td522 class MayStore {
985 "", [], II_SAVE >, MayStore {
993 "", [], II_SAVE >, MayStore {
1004 FEXT_RRI16_mem2_ins<0b11000, "sb", mem16, II_SB>, MayStore;
1142 FEXT_RRI16_mem2_ins<0b11001, "sh", mem16, II_SH>, MayStore;
1277 def SwRxRyOffMemX16: FEXT_RRI16_mem2_ins<0b11011, "sw", mem16, II_SW>, MayStore;
1284 def SwRxSpImmX16: FEXT_RRI16_mem2_ins<0b11010, "sw", mem16sp, II_SW>, MayStore;
/external/swiftshader/third_party/LLVM/utils/TableGen/
DCodeGenDAGPatterns.cpp2471 bool &MayStore, bool &MayLoad, in InferFromPattern() argument
2475 MayStore = MayLoad = IsBitcast = HasSideEffects = IsVariadic = false; in InferFromPattern()
2478 InstAnalyzer(CDP, MayStore, MayLoad, IsBitcast, HasSideEffects, IsVariadic) in InferFromPattern()
2485 if (MayStore) in InferFromPattern()
2490 MayStore = true; in InferFromPattern()
2824 bool MayStore, MayLoad, IsBitcast, HasSideEffects, IsVariadic; in InferInstructionFlags() local
2825 InferFromPattern(InstInfo, MayStore, MayLoad, IsBitcast, in InferInstructionFlags()
2827 InstInfo.mayStore = MayStore; in InferInstructionFlags()
/external/llvm/include/llvm/CodeGen/
DMachineInstr.h624 return hasProperty(MCID::MayStore, Type);
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfoV4.td4003 // because the SDNode ISD::PREFETCH has properties MayLoad and MayStore.