Searched refs:N3RegVShFrm (Results 1 – 6 of 6) sorted by relevance
/external/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMBaseInfo.h | 401 N3RegVShFrm = 38 << FormShift, enumerator
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
D | ARMBaseInfo.h | 384 N3RegVShFrm = 38 << FormShift, enumerator
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrNEON.td | 4111 defm VSHLs : N3VInt_QHSDSh<0, 0, 0b0100, 0, N3RegVShFrm, 4114 defm VSHLu : N3VInt_QHSDSh<1, 0, 0b0100, 0, N3RegVShFrm, 4150 defm VRSHLs : N3VInt_QHSDSh<0, 0, 0b0101, 0, N3RegVShFrm, 4153 defm VRSHLu : N3VInt_QHSDSh<1, 0, 0b0101, 0, N3RegVShFrm, 4165 defm VQSHLs : N3VInt_QHSDSh<0, 0, 0b0100, 1, N3RegVShFrm, 4168 defm VQSHLu : N3VInt_QHSDSh<1, 0, 0b0100, 1, N3RegVShFrm, 4189 defm VQRSHLs : N3VInt_QHSDSh<0, 0, 0b0101, 1, N3RegVShFrm, 4192 defm VQRSHLu : N3VInt_QHSDSh<1, 0, 0b0101, 1, N3RegVShFrm,
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D | ARMInstrFormats.td | 67 def N3RegVShFrm : Format<38>;
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrNEON.td | 5414 defm VSHLs : N3VInt_QHSDSh<0, 0, 0b0100, 0, N3RegVShFrm, 5417 defm VSHLu : N3VInt_QHSDSh<1, 0, 0b0100, 0, N3RegVShFrm, 5478 defm VRSHLs : N3VInt_QHSDSh<0, 0, 0b0101, 0, N3RegVShFrm, 5481 defm VRSHLu : N3VInt_QHSDSh<1, 0, 0b0101, 0, N3RegVShFrm, 5495 defm VQSHLs : N3VInt_QHSDSh<0, 0, 0b0100, 1, N3RegVShFrm, 5498 defm VQSHLu : N3VInt_QHSDSh<1, 0, 0b0100, 1, N3RegVShFrm, 5519 defm VQRSHLs : N3VInt_QHSDSh<0, 0, 0b0101, 1, N3RegVShFrm, 5522 defm VQRSHLu : N3VInt_QHSDSh<1, 0, 0b0101, 1, N3RegVShFrm,
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D | ARMInstrFormats.td | 67 def N3RegVShFrm : Format<38>;
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