Searched refs:Neon32 (Results 1 – 5 of 5) sorted by relevance
/external/v8/src/arm/ |
D | simulator-arm.cc | 3468 NeonSize size = Neon32; in DecodeTypeVFP() 3495 case Neon32: { in DecodeTypeVFP() 4057 case Neon32: in DecodeSpecialCondition() 4110 case Neon32: in DecodeSpecialCondition() 4153 case Neon32: { in DecodeSpecialCondition() 4203 case Neon32: { in DecodeSpecialCondition() 4248 case Neon32: { in DecodeSpecialCondition() 4285 case Neon32: { in DecodeSpecialCondition() 4327 case Neon32: { in DecodeSpecialCondition() 4488 case Neon32: { in DecodeSpecialCondition() [all …]
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D | constants-arm.h | 352 Neon32 = 0x2, enumerator
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D | macro-assembler-arm.cc | 1189 DCHECK_EQ(Neon32, size); in Swizzle() 1190 DCHECK_IMPLIES(size == Neon32, lanes < 0xFFFFu); in Swizzle() 1191 if (size == Neon32) { in Swizzle() 1221 vrev64(Neon32, dst, src); in Swizzle()
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D | assembler-arm.cc | 3993 case Neon32: in vdup() 4081 DCHECK_IMPLIES(is_float, size == Neon32); in EncodeNeonUnaryOp() 4095 emit(EncodeNeonUnaryOp(0x6, true, Neon32, dst, src)); in vabs() 4110 emit(EncodeNeonUnaryOp(0x7, true, Neon32, dst, src)); in vneg() 4643 emit(EncodeNeonVREV(Neon32, size, dst, src)); in vrev32()
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/external/v8/src/compiler/arm/ |
D | code-generator-arm.cc | 1559 __ vdup(Neon32, i.OutputSimd128Register(), i.InputRegister(0)); in AssembleArchInstruction() 1581 __ vneg(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0)); in AssembleArchInstruction() 1595 __ vadd(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction() 1600 __ vsub(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction() 1605 __ vmul(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction() 1620 __ vceq(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction() 1626 __ vceq(Neon32, dst, i.InputSimd128Register(0), in AssembleArchInstruction()
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