| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 171 unsigned NumCycles, unsigned ExtraPredCycles,
181 unsigned NumCycles, in isProfitableToDupForIfCvt() argument
184 return NumCycles == 1; in isProfitableToDupForIfCvt()
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| D | ARMBaseInstrInfo.cpp | 1391 unsigned NumCycles, unsigned ExtraPredCycles, in isProfitableToIfCvt() argument
1393 if (!NumCycles) in isProfitableToIfCvt()
1397 unsigned UnpredCost = Probability.getNumerator() * NumCycles; in isProfitableToIfCvt()
1402 return (NumCycles + ExtraPredCycles) <= UnpredCost; in isProfitableToIfCvt()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.h | 210 unsigned NumCycles, unsigned ExtraPredCycles, in isProfitableToIfCvt() argument
221 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, in isProfitableToDupForIfCvt() argument
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.h | 177 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
185 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
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| D | SystemZInstrInfo.cpp | 557 unsigned NumCycles, unsigned ExtraPredCycles, in isProfitableToIfCvt() argument
571 return NumCycles == 1; in isProfitableToIfCvt()
585 isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, in isProfitableToDupForIfCvt() argument
588 return NumCycles == 1; in isProfitableToDupForIfCvt()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 233 unsigned NumCycles, unsigned ExtraPredCycles,
241 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, in isProfitableToDupForIfCvt() argument
243 return NumCycles == 1; in isProfitableToDupForIfCvt()
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| D | ARMScheduleA9.td | 2015 foreach NumCycles = 2-8 in {
2016 def A9WriteCycle#NumCycles : WriteSequence<[A9WriteCycle1], NumCycles>;
2017 } // foreach NumCycles
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| D | ARMBaseInstrInfo.cpp | 1701 unsigned NumCycles, unsigned ExtraPredCycles, in isProfitableToIfCvt() argument
1703 if (!NumCycles) in isProfitableToIfCvt()
1735 unsigned UnpredCost = Probability.scale(NumCycles * ScalingUpFactor); in isProfitableToIfCvt()
1739 return (NumCycles + ExtraPredCycles) * ScalingUpFactor <= UnpredCost; in isProfitableToIfCvt()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.h | 127 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
149 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
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| D | HexagonInstrInfo.cpp | 741 unsigned NumCycles, unsigned ExtraPredCycles, in isProfitableToIfCvt() argument
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | IfConversion.cpp | 665 unsigned NumCycles = TII->getInstrLatency(InstrItins, &*I, in ScanInstructions() local
667 if (NumCycles > 1) in ScanInstructions()
668 BBI.ExtraCost += NumCycles-1; in ScanInstructions()
1407 unsigned NumCycles = TII->getInstrLatency(InstrItins, &*I, &ExtraPredCost); in CopyAndPredicateBlock() local
1408 if (NumCycles > 1) in CopyAndPredicateBlock()
1409 ToBBI.ExtraCost += NumCycles-1; in CopyAndPredicateBlock()
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| /external/llvm/lib/CodeGen/ |
| D | IfConversion.cpp | 725 unsigned NumCycles = SchedModel.computeInstrLatency(&MI, false); in ScanInstructions() local
726 if (NumCycles > 1) in ScanInstructions()
727 BBI.ExtraCost += NumCycles-1; in ScanInstructions()
1670 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in CopyAndPredicateBlock() local
1671 if (NumCycles > 1) in CopyAndPredicateBlock()
1672 ToBBI.ExtraCost += NumCycles-1; in CopyAndPredicateBlock()
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| D | MachinePipeliner.cpp | 1308 unsigned NumCycles = getSUnit(MI)->Latency; in calculateResMII() local
1312 for (unsigned C = 0; C < NumCycles; ++C) in calculateResMII()
1325 for (unsigned C = ReservedCycles; C < NumCycles; ++C) { in calculateResMII()
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| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 622 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, in isProfitableToIfCvt() argument
650 isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, in isProfitableToDupForIfCvt() argument
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SchedVulcan.td | 90 // All definitions follow the format: VulcanWrite_<NumCycles>Cyc_<Resources>.
|