/external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
D | disasm-a3xx.c | 659 #define OPC(cat, opc, name) [(opc)] = { (cat), (opc), #name, print_instr_cat##cat } macro 661 OPC(0, OPC_NOP, nop), 662 OPC(0, OPC_BR, br), 663 OPC(0, OPC_JUMP, jump), 664 OPC(0, OPC_CALL, call), 665 OPC(0, OPC_RET, ret), 666 OPC(0, OPC_KILL, kill), 667 OPC(0, OPC_END, end), 668 OPC(0, OPC_EMIT, emit), 669 OPC(0, OPC_CUT, cut), [all …]
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/external/mesa3d/src/gallium/drivers/etnaviv/ |
D | etnaviv_disasm.c | 459 #define OPC(opc) [INST_OPCODE_##opc] = {#opc, print_opc_default} macro 463 OPC(NOP), 464 OPC(ADD), 465 OPC(MAD), 466 OPC(MUL), 467 OPC(DST), 468 OPC(DP3), 469 OPC(DP4), 470 OPC(DSX), 471 OPC(DSY), [all …]
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/external/swiftshader/third_party/LLVM/include/llvm/ |
D | Instruction.h | 312 #define HANDLE_TERM_INST(N, OPC, CLASS) OPC = N, argument 319 #define HANDLE_BINARY_INST(N, OPC, CLASS) OPC = N, argument 326 #define HANDLE_MEMORY_INST(N, OPC, CLASS) OPC = N, argument 333 #define HANDLE_CAST_INST(N, OPC, CLASS) OPC = N, argument 340 #define HANDLE_OTHER_INST(N, OPC, CLASS) OPC = N, argument
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D | InstrTypes.h | 177 #define HANDLE_BINARY_INST(N, OPC, CLASS) \ 178 static BinaryOperator *Create##OPC(Value *V1, Value *V2, \ 180 return Create(Instruction::OPC, V1, V2, Name);\ 183 #define HANDLE_BINARY_INST(N, OPC, CLASS) \ 184 static BinaryOperator *Create##OPC(Value *V1, Value *V2, \ 186 return Create(Instruction::OPC, V1, V2, Name, BB);\ 189 #define HANDLE_BINARY_INST(N, OPC, CLASS) \ 190 static BinaryOperator *Create##OPC(Value *V1, Value *V2, \ 192 return Create(Instruction::OPC, V1, V2, Name, I);\ 253 #define DEFINE_HELPERS(OPC, NUWNSWEXACT) \ [all …]
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/external/llvm/include/llvm/IR/ |
D | Instruction.h | 476 #define HANDLE_TERM_INST(N, OPC, CLASS) OPC = N, 483 #define HANDLE_BINARY_INST(N, OPC, CLASS) OPC = N, 490 #define HANDLE_MEMORY_INST(N, OPC, CLASS) OPC = N, 497 #define HANDLE_CAST_INST(N, OPC, CLASS) OPC = N, 504 #define HANDLE_FUNCLETPAD_INST(N, OPC, CLASS) OPC = N, 511 #define HANDLE_OTHER_INST(N, OPC, CLASS) OPC = N,
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D | InstrTypes.h | 370 #define HANDLE_BINARY_INST(N, OPC, CLASS) \ 371 static BinaryOperator *Create##OPC(Value *V1, Value *V2, \ 373 return Create(Instruction::OPC, V1, V2, Name);\ 376 #define HANDLE_BINARY_INST(N, OPC, CLASS) \ 377 static BinaryOperator *Create##OPC(Value *V1, Value *V2, \ 379 return Create(Instruction::OPC, V1, V2, Name, BB);\ 382 #define HANDLE_BINARY_INST(N, OPC, CLASS) \ 383 static BinaryOperator *Create##OPC(Value *V1, Value *V2, \ 385 return Create(Instruction::OPC, V1, V2, Name, I);\ 455 #define DEFINE_HELPERS(OPC, NUWNSWEXACT) \ [all …]
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/external/swiftshader/third_party/llvm-subzero/include/llvm/IR/ |
D | Instruction.h | 518 #define HANDLE_TERM_INST(N, OPC, CLASS) OPC = N, argument 525 #define HANDLE_BINARY_INST(N, OPC, CLASS) OPC = N, argument 532 #define HANDLE_MEMORY_INST(N, OPC, CLASS) OPC = N, argument 539 #define HANDLE_CAST_INST(N, OPC, CLASS) OPC = N, argument 546 #define HANDLE_FUNCLETPAD_INST(N, OPC, CLASS) OPC = N, argument 553 #define HANDLE_OTHER_INST(N, OPC, CLASS) OPC = N, argument
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/external/llvm/include/llvm/Target/ |
D | TargetOpcodes.h | 23 #define HANDLE_TARGET_OPCODE(OPC, NUM) OPC = NUM, argument 24 #define HANDLE_TARGET_OPCODE_MARKER(IDENT, OPC) IDENT = OPC, argument
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D | TargetOpcodes.def | 19 #define HANDLE_TARGET_OPCODE(OPC, NUM) 25 #define HANDLE_TARGET_OPCODE_MARKER(IDENT, OPC)
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/external/libpcap/ |
D | grammar.h | 157 OPC = 367, enumerator 279 #define OPC 367 macro
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D | grammar.y | 327 %token SIO OPC DPC SLS HSIO HOPC HDPC HSLS 739 | OPC { $$.mtp3fieldtype = M_OPC; }
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D | scanner.l | 370 opc return OPC;
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D | grammar.c | 460 OPC = 367, enumerator 582 #define OPC 367 macro
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D | scanner.c | 3657 return OPC;
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/external/llvm/utils/TableGen/ |
D | CodeGenTarget.cpp | 304 #define HANDLE_TARGET_OPCODE(OPC, NUM) #OPC, in ComputeInstrsByEnum() argument
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/external/llvm/lib/Target/PowerPC/ |
D | README.txt | 644 OP_type is the operand type - one of OPC (opcode), RD (register destination),
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrFormats.td | 9334 // SWP SZ |111000|A |R |1 |Rs |1 |OPC|00|Rn |Rt 9335 // LD SZ |111000|A |R |1 |Rs |0 |OPC|00|Rn |Rt 9336 // ST SZ |111000|A |R |1 |Rs |0 |OPC|00|Rn |11111
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