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Searched refs:OP_SET_OR (Results 1 – 9 of 9) sorted by relevance

/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_target_gm107.cpp223 case OP_SET_OR: in getLatency()
Dnv50_ir_emit_gm107.cpp1143 case OP_SET_OR : emitField(0x2d, 2, 1); break; in emitDSET()
1191 case OP_SET_OR : emitField(0x2d, 2, 1); break; in emitDSETP()
1513 case OP_SET_OR : emitField(0x2d, 2, 1); break; in emitFSET()
1562 case OP_SET_OR : emitField(0x2d, 2, 1); break; in emitFSETP()
1948 case OP_SET_OR : emitField(0x2d, 2, 1); break; in emitISET()
1994 case OP_SET_OR : emitField(0x2d, 2, 1); break; in emitISETP()
3196 case OP_SET_OR: in emitInstruction()
Dnv50_ir_target_nv50.cpp432 case OP_SET_OR: in isOpSupported()
Dnv50_ir_target_nvc0.cpp141 { OP_SET_OR, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 },
Dnv50_ir.h77 OP_SET_OR, enumerator
Dnv50_ir_peephole.cpp230 insn->op == OP_SET_OR || insn->op == OP_SET_XOR) in checkSwapSrc01()
1830 logop->op == OP_XOR ? OP_SET_XOR : OP_SET_OR); in handleLOGOP()
1835 set0->op != OP_SET_OR && in handleLOGOP()
2108 set->op == OP_SET_OR || set->op == OP_SET_XOR) && in handleNEG()
Dnv50_ir_emit_gk110.cpp1132 case OP_SET_OR: code[1] |= 0x1 << 16; break; in emitSET()
2475 case OP_SET_OR: in emitInstruction()
Dnv50_ir_lowering_nvc0.cpp1878 bld.mkCmp(OP_SET_OR, CC_NE, TYPE_U32, pred1->getDef(0), in processSurfaceCoordsNVE4()
2098 bld.mkCmp(OP_SET_OR, CC_NE, TYPE_U32, pred->getDef(0), in processSurfaceCoordsNVC0()
2197 bld.mkCmp(OP_SET_OR, CC_NE, TYPE_U32, pred->getDef(0), in processSurfaceCoordsGM107()
Dnv50_ir_emit_nvc0.cpp1165 case OP_SET_OR: hi = 0x10200000; break; in emitSET()
2670 case OP_SET_OR: in emitInstruction()