Searched refs:ORRS (Results 1 – 12 of 12) sorted by relevance
| /external/llvm/test/MC/ARM/ |
| D | thumb2-narrow-dp.ll | 729 ORRS r7, r2, r1 // Must be wide - 3 distinct registers
730 ORRS r2, r2, r1 // Should choose narrow
731 ORRS r3, r1, r3 // Should choose narrow - commutative
732 ORRS.W r4, r4, r1 // Explicitly wide
733 ORRS.W r5, r1, r5
735 ORRS r7, r7, r1 // Should use narrow
736 ORRS r7, r1, r7 // Commutative
737 ORRS r8, r1, r8 // high registers so must use wide encoding
738 ORRS r8, r8, r1
739 ORRS r1, r8, r1
[all …]
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| /external/vixl/test/aarch32/config/ |
| D | cond-rd-rn-operand-rm-t32.json | 88 "Orrs", // ORRS{<q>} {<Rdn>}, <Rdn>, <Rm> ; T1
89 // ORRS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T2
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| D | cond-rd-rn-operand-const-a32.json | 43 "Orrs", // ORRS{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; A1
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| D | cond-rd-rn-operand-const-t32.json | 51 "Orrs", // ORRS{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T1
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| D | cond-rd-rn-operand-rm-shift-rs-a32.json | 40 "Orrs", // ORRS{<c>}{<q>} {<Rd>}, <Rn>, <Rm>, <shift> <Rs> ; A1
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| D | cond-rd-rn-operand-rm-shift-amount-1to32-a32.json | 42 "Orrs", // ORRS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
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| D | cond-rd-rn-operand-rm-shift-amount-1to31-a32.json | 42 "Orrs", // ORRS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
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| D | cond-rd-rn-operand-rm-shift-amount-1to32-t32.json | 48 "Orrs", // ORRS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T2
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| D | cond-rd-rn-operand-rm-shift-amount-1to31-t32.json | 48 "Orrs", // ORRS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T2
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| D | cond-rd-rn-operand-rm-a32.json | 51 "Orrs", // ORRS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
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| /external/valgrind/docs/internals/ |
| D | t-chaining-notes.txt | 54 arm codegen: Generate ORRS for CmpwNEZ32(Or32(x,y))
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| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeARM_T2_32.c | 139 #define ORRS 0x4300 macro
764 return push_inst16(compiler, ORRS | RD3(dst) | RN3(arg2)); in emit_op_imm()
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