| /external/llvm/lib/Target/X86/ |
| D | X86InstrSystem.td | 79 "in{w}\t{%dx, %ax|ax, dx}", [], IIC_IN_RR>, OpSize16;
89 "in{w}\t{$port, %ax|ax, $port}", [], IIC_IN_RI>, OpSize16;
99 "out{w}\t{%ax, %dx|dx, ax}", [], IIC_OUT_RR>, OpSize16;
109 "out{w}\t{%ax, $port|$port, ax}", [], IIC_OUT_IR>, OpSize16;
171 "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_REG_SR>, OpSize16;
178 "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_MEM_SR>, OpSize16;
185 "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_REG>, OpSize16;
192 "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV_SR_MEM>, OpSize16;
207 OpSize16;
210 OpSize16;
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| D | X86InstrControl.td | 32 [], IIC_RET>, OpSize16;
43 [], IIC_RET_IMM>, OpSize16;
49 "{l}ret{w|f}", [], IIC_RET>, OpSize16;
55 "{l}ret{w|f}\t$amt", [], IIC_RET>, OpSize16;
61 OpSize16;
77 "jmp\t$dst", [], IIC_JMP_REL>, OpSize16;
90 [], IIC_Jcc>, OpSize16, TB;
137 OpSize16, Sched<[WriteJump]>;
140 Requires<[Not64BitMode]>, OpSize16, Sched<[WriteJumpLd]>;
160 IIC_JMP_FAR_PTR>, OpSize16, Sched<[WriteJump]>;
[all …]
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| D | X86InstrShiftRotate.td | 25 [(set GR16:$dst, (shl GR16:$src1, CL))], IIC_SR>, OpSize16;
42 OpSize16;
60 "shl{w}\t$dst", [], IIC_SR>, OpSize16;
79 OpSize16;
95 IIC_SR>, OpSize16;
113 IIC_SR>, OpSize16;
131 [(set GR16:$dst, (srl GR16:$src1, CL))], IIC_SR>, OpSize16;
146 IIC_SR>, OpSize16;
161 [(set GR16:$dst, (srl GR16:$src1, (i8 1)))], IIC_SR>, OpSize16;
179 OpSize16;
[all …]
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| D | X86InstrExtension.td | 17 "{cbtw|cbw}", [], IIC_CBW>, OpSize16; // AX = signext(AL)
24 "{cwtd|cwd}", [], IIC_CBW>, OpSize16; // DX:AX = signext(AX)
45 TB, OpSize16, Sched<[WriteALU]>;
49 TB, OpSize16, Sched<[WriteALULd]>;
71 TB, OpSize16, Sched<[WriteALU]>;
75 TB, OpSize16, Sched<[WriteALULd]>;
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| D | X86InstrInfo.td | 1062 "nop{w}\t$zero", [], IIC_NOP>, TB, OpSize16;
1095 IIC_POP_REG16>, OpSize16;
1099 IIC_POP_REG>, OpSize16;
1101 IIC_POP_MEM>, OpSize16;
1110 IIC_PUSH_REG>, OpSize16;
1114 IIC_PUSH_REG>, OpSize16;
1119 "push{w}\t$imm", [], IIC_PUSH_IMM>, OpSize16;
1121 "push{w}\t$imm", [], IIC_PUSH_IMM>, OpSize16;
1133 IIC_PUSH_MEM>, OpSize16;
1169 OpSize16;
[all …]
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| D | X86InstrArithmetic.td | 21 "lea{w}\t{$src|$dst}, {$dst|$src}", [], IIC_LEA_16>, OpSize16;
71 [], IIC_MUL16_REG>, OpSize16, Sched<[WriteIMul]>;
98 [], IIC_MUL16_MEM>, OpSize16, SchedLoadReg<WriteIMulLd>;
118 IIC_IMUL16_RR>, OpSize16, Sched<[WriteIMul]>;
136 "imul{w}\t$src", [], IIC_IMUL16_MEM>, OpSize16,
161 TB, OpSize16;
183 TB, OpSize16;
212 IIC_IMUL16_RRI>, OpSize16;
218 IIC_IMUL16_RRI>, OpSize16;
253 OpSize16;
[all …]
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| D | X86InstrTSX.td | 28 "xbegin\t$dst", []>, OpSize16, Requires<[HasRTM]>;
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| D | X86InstrCMovSetCC.td | 25 IIC_CMOV16_RR>, TB, OpSize16;
47 TB, OpSize16;
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| D | X86InstrCompiler.td | 387 [(X86rep_movs i16)], IIC_REP_MOVS>, REP, OpSize16,
399 [(X86rep_movs i16)], IIC_REP_MOVS>, REP, OpSize16,
417 [(X86rep_stos i16)], IIC_REP_STOS>, REP, OpSize16,
432 [(X86rep_stos i16)], IIC_REP_STOS>, REP, OpSize16,
612 IIC_ALU_NONMEM>, OpSize16, LOCK;
644 IIC_ALU_MEM>, OpSize16, LOCK;
668 IIC_ALU_MEM>, OpSize16, LOCK;
707 IIC_UNARY_MEM>, OpSize16, LOCK;
744 [(frag addr:$ptr, GR16:$swap, 2)], itin>, TB, OpSize16, LOCK;
837 itin>, OpSize16;
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| D | X86InstrFormats.td | 150 def OpSize16 : OperandSize<1>; // Needs 0x66 prefix in 32-bit mode.
164 class OpSize16 { OperandSize OpSize = OpSize16; }
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| D | X86InstrSSE.td | 6660 OpSize16, XS;
6665 Sched<[WriteFAddLd]>, OpSize16, XS;
7490 int_x86_sse42_crc32_32_16>, OpSize16;
7492 int_x86_sse42_crc32_32_16>, OpSize16;
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| /external/llvm/utils/TableGen/ |
| D | X86RecognizableInstr.cpp | 131 OpSize16 = 1, OpSize32 = 2 enumerator
419 if (HasREX_WPrefix && (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD)) in insnContext()
423 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext()
425 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext()
427 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize32) in insnContext()
429 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext()
446 if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext()
448 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext()
450 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize16) in insnContext()
452 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext()
[all …]
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86BaseInfo.h | 333 OpSize16 = 1 << OpSizeShift, enumerator
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| D | X86MCCodeEmitter.cpp | 1065 : X86II::OpSize16)) in emitOpcodePrefix()
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