Searched refs:Q_ADDR (Results 1 – 4 of 4) sorted by relevance
/external/syslinux/gpxe/src/drivers/net/ |
D | sky2.c | 845 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET); in sky2_qset() 846 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT); in sky2_qset() 847 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON); in sky2_qset() 848 sky2_write32(hw, Q_ADDR(q, Q_WM), BMU_WM_DEFAULT); in sky2_qset() 951 Q_ADDR(rxqaddr[sky2->port], Q_CSR), in rx_set_checksum() 981 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST); in sky2_rx_stop() 1056 sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX); in sky2_rx_start() 1063 sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS); in sky2_rx_start() 1187 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF); in sky2_up() 1192 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV); in sky2_up() [all …]
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D | skge.c | 1688 skge_write32(hw, Q_ADDR(q, Q_CSR), CSR_CLR_RESET); in skge_qset() 1689 skge_write32(hw, Q_ADDR(q, Q_F), watermark); in skge_qset() 1690 skge_write32(hw, Q_ADDR(q, Q_DA_H), (u32)(base >> 32)); in skge_qset() 1691 skge_write32(hw, Q_ADDR(q, Q_DA_L), (u32)base); in skge_qset() 1768 skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_START | CSR_IRQ_CL_F); in skge_up() 1786 skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_STOP); in skge_rx_stop() 1789 skge_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_SET_RESET); in skge_rx_stop() 1818 skge_write8(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_STOP); in skge_down() 1832 skge_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_SET_RESET); in skge_down() 1895 skge_write8(hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_START); in skge_xmit_frame() [all …]
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D | sky2.h | 648 #define Q_ADDR(reg, offs) (B8_Q_REGS + (reg) + (offs)) macro
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D | skge.h | 537 #define Q_ADDR(reg, offs) (B8_Q_REGS + (reg) + (offs)) macro
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