Searched refs:RCID (Results 1 – 9 of 9) sorted by relevance
213 int RCID = Desc.OpInfo[i].RegClass; in encodeInstruction() local214 const MCRegisterClass &RC = MRI.getRegClass(RCID); in encodeInstruction()283 int RCID = Desc.OpInfo[OpNo].RegClass; in getMachineOpValue() local284 const MCRegisterClass &RC = MRI.getRegClass(RCID); in getMachineOpValue()
98 bool isSGPRClassID(unsigned RCID) const { in isSGPRClassID()99 return isSGPRClass(getRegClass(RCID)); in isSGPRClassID()
1860 unsigned RCID = Desc.OpInfo[OpNo].RegClass; in getOpRegClass() local1861 return RI.getRegClass(RCID); in getOpRegClass()1881 unsigned RCID = get(MI.getOpcode()).OpInfo[OpIdx].RegClass; in legalizeOpWithMove() local1882 const TargetRegisterClass *RC = RI.getRegClass(RCID); in legalizeOpWithMove()
207 unsigned RCID = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue(); in getOperandRegClass() local209 Subtarget->getRegisterInfo()->getRegClass(RCID); in getOperandRegClass()
879 unsigned RCID; in getRegClassConstraint() local880 if (InlineAsm::hasRegClassConstraint(Flag, RCID)) in getRegClassConstraint()881 return TRI->getRegClass(RCID); in getRegClassConstraint()1475 unsigned RCID = 0; in print() local1476 if (InlineAsm::hasRegClassConstraint(Flag, RCID)) { in print()1478 OS << ':' << TM->getRegisterInfo()->getRegClass(RCID)->getName(); in print()1480 OS << ":RC" << RCID; in print()
1203 unsigned RCID; in getRegClassConstraint() local1204 if (InlineAsm::hasRegClassConstraint(Flag, RCID)) in getRegClassConstraint()1205 return TRI->getRegClass(RCID); in getRegClassConstraint()1828 unsigned RCID = 0; in print() local1829 if (InlineAsm::hasRegClassConstraint(Flag, RCID)) { in print()1831 OS << ':' << TRI->getRegClassName(TRI->getRegClass(RCID)); in print()1833 OS << ":RC" << RCID; in print()
386 int RCID = Desc.OpInfo[OpNo].RegClass; in printOperand() local387 if (RCID != -1) { in printOperand()388 const MCRegisterClass &ImmRC = MRI.getRegClass(RCID); in printOperand()
246 bool isRegClass(unsigned RCID) const { in isRegClass()247 return isReg() && Reg.TRI->getRegClass(RCID).contains(getReg()); in isRegClass()932 int RCID = getRegClass(RegKind, RegWidth); in ParseAMDGPURegister() local933 if (RCID == -1) in ParseAMDGPURegister()935 const MCRegisterClass RC = TRI->getRegClass(RCID); in ParseAMDGPURegister()
1467 unsigned RCID; in handleSpecialFP() local1485 if (InlineAsm::hasRegClassConstraint(Flags, RCID)) { in handleSpecialFP()