1 /*
2 * Definitions for RTL818x hardware
3 *
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
6 *
7 * Modified for gPXE, June 2009, by Joshua Oreman <oremanj@rwcr.net>
8 *
9 * Based on the r8187 driver, which is:
10 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16
17 #ifndef RTL818X_H
18 #define RTL818X_H
19
20 #include <gpxe/spi_bit.h>
21 #include <gpxe/tables.h>
22
23 FILE_LICENCE(GPL2_ONLY);
24
25 struct rtl818x_csr {
26 u8 MAC[6];
27 u8 reserved_0[2];
28 u32 MAR[2];
29 u8 RX_FIFO_COUNT;
30 u8 reserved_1;
31 u8 TX_FIFO_COUNT;
32 u8 BQREQ;
33 u8 reserved_2[4];
34 u32 TSFT[2];
35 u32 TLPDA;
36 u32 TNPDA;
37 u32 THPDA;
38 u16 BRSR;
39 u8 BSSID[6];
40 u8 RESP_RATE;
41 u8 EIFS;
42 u8 reserved_3[1];
43 u8 CMD;
44 #define RTL818X_CMD_TX_ENABLE (1 << 2)
45 #define RTL818X_CMD_RX_ENABLE (1 << 3)
46 #define RTL818X_CMD_RESET (1 << 4)
47 u8 reserved_4[4];
48 u16 INT_MASK;
49 u16 INT_STATUS;
50 #define RTL818X_INT_RX_OK (1 << 0)
51 #define RTL818X_INT_RX_ERR (1 << 1)
52 #define RTL818X_INT_TXL_OK (1 << 2)
53 #define RTL818X_INT_TXL_ERR (1 << 3)
54 #define RTL818X_INT_RX_DU (1 << 4)
55 #define RTL818X_INT_RX_FO (1 << 5)
56 #define RTL818X_INT_TXN_OK (1 << 6)
57 #define RTL818X_INT_TXN_ERR (1 << 7)
58 #define RTL818X_INT_TXH_OK (1 << 8)
59 #define RTL818X_INT_TXH_ERR (1 << 9)
60 #define RTL818X_INT_TXB_OK (1 << 10)
61 #define RTL818X_INT_TXB_ERR (1 << 11)
62 #define RTL818X_INT_ATIM (1 << 12)
63 #define RTL818X_INT_BEACON (1 << 13)
64 #define RTL818X_INT_TIME_OUT (1 << 14)
65 #define RTL818X_INT_TX_FO (1 << 15)
66 u32 TX_CONF;
67 #define RTL818X_TX_CONF_LOOPBACK_MAC (1 << 17)
68 #define RTL818X_TX_CONF_LOOPBACK_CONT (3 << 17)
69 #define RTL818X_TX_CONF_NO_ICV (1 << 19)
70 #define RTL818X_TX_CONF_DISCW (1 << 20)
71 #define RTL818X_TX_CONF_SAT_HWPLCP (1 << 24)
72 #define RTL818X_TX_CONF_R8180_ABCD (2 << 25)
73 #define RTL818X_TX_CONF_R8180_F (3 << 25)
74 #define RTL818X_TX_CONF_R8185_ABC (4 << 25)
75 #define RTL818X_TX_CONF_R8185_D (5 << 25)
76 #define RTL818X_TX_CONF_R8187vD (5 << 25)
77 #define RTL818X_TX_CONF_R8187vD_B (6 << 25)
78 #define RTL818X_TX_CONF_HWVER_MASK (7 << 25)
79 #define RTL818X_TX_CONF_DISREQQSIZE (1 << 28)
80 #define RTL818X_TX_CONF_PROBE_DTS (1 << 29)
81 #define RTL818X_TX_CONF_HW_SEQNUM (1 << 30)
82 #define RTL818X_TX_CONF_CW_MIN (1 << 31)
83 u32 RX_CONF;
84 #define RTL818X_RX_CONF_MONITOR (1 << 0)
85 #define RTL818X_RX_CONF_NICMAC (1 << 1)
86 #define RTL818X_RX_CONF_MULTICAST (1 << 2)
87 #define RTL818X_RX_CONF_BROADCAST (1 << 3)
88 #define RTL818X_RX_CONF_FCS (1 << 5)
89 #define RTL818X_RX_CONF_DATA (1 << 18)
90 #define RTL818X_RX_CONF_CTRL (1 << 19)
91 #define RTL818X_RX_CONF_MGMT (1 << 20)
92 #define RTL818X_RX_CONF_ADDR3 (1 << 21)
93 #define RTL818X_RX_CONF_PM (1 << 22)
94 #define RTL818X_RX_CONF_BSSID (1 << 23)
95 #define RTL818X_RX_CONF_RX_AUTORESETPHY (1 << 28)
96 #define RTL818X_RX_CONF_CSDM1 (1 << 29)
97 #define RTL818X_RX_CONF_CSDM2 (1 << 30)
98 #define RTL818X_RX_CONF_ONLYERLPKT (1 << 31)
99 u32 INT_TIMEOUT;
100 u32 TBDA;
101 u8 EEPROM_CMD;
102 #define RTL818X_EEPROM_CMD_READ (1 << 0)
103 #define RTL818X_EEPROM_CMD_WRITE (1 << 1)
104 #define RTL818X_EEPROM_CMD_CK (1 << 2)
105 #define RTL818X_EEPROM_CMD_CS (1 << 3)
106 #define RTL818X_EEPROM_CMD_NORMAL (0 << 6)
107 #define RTL818X_EEPROM_CMD_LOAD (1 << 6)
108 #define RTL818X_EEPROM_CMD_PROGRAM (2 << 6)
109 #define RTL818X_EEPROM_CMD_CONFIG (3 << 6)
110 u8 CONFIG0;
111 u8 CONFIG1;
112 u8 CONFIG2;
113 #define RTL818X_CONFIG2_ANTENNA_DIV (1 << 6)
114 u32 ANAPARAM;
115 u8 MSR;
116 #define RTL818X_MSR_NO_LINK (0 << 2)
117 #define RTL818X_MSR_ADHOC (1 << 2)
118 #define RTL818X_MSR_INFRA (2 << 2)
119 #define RTL818X_MSR_MASTER (3 << 2)
120 #define RTL818X_MSR_ENEDCA (4 << 2)
121 u8 CONFIG3;
122 #define RTL818X_CONFIG3_ANAPARAM_WRITE (1 << 6)
123 #define RTL818X_CONFIG3_GNT_SELECT (1 << 7)
124 u8 CONFIG4;
125 #define RTL818X_CONFIG4_POWEROFF (1 << 6)
126 #define RTL818X_CONFIG4_VCOOFF (1 << 7)
127 u8 TESTR;
128 u8 reserved_9[2];
129 u8 PGSELECT;
130 u8 SECURITY;
131 u32 ANAPARAM2;
132 u8 reserved_10[12];
133 u16 BEACON_INTERVAL;
134 u16 ATIM_WND;
135 u16 BEACON_INTERVAL_TIME;
136 u16 ATIMTR_INTERVAL;
137 u8 PHY_DELAY;
138 u8 CARRIER_SENSE_COUNTER;
139 u8 reserved_11[2];
140 u8 PHY[4];
141 u16 RFPinsOutput;
142 u16 RFPinsEnable;
143 u16 RFPinsSelect;
144 u16 RFPinsInput;
145 u32 RF_PARA;
146 u32 RF_TIMING;
147 u8 GP_ENABLE;
148 u8 GPIO;
149 u8 reserved_12[2];
150 u32 HSSI_PARA;
151 u8 reserved_13[4];
152 u8 TX_AGC_CTL;
153 #define RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT (1 << 0)
154 #define RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT (1 << 1)
155 #define RTL818X_TX_AGC_CTL_FEEDBACK_ANT (1 << 2)
156 u8 TX_GAIN_CCK;
157 u8 TX_GAIN_OFDM;
158 u8 TX_ANTENNA;
159 u8 reserved_14[16];
160 u8 WPA_CONF;
161 u8 reserved_15[3];
162 u8 SIFS;
163 u8 DIFS;
164 u8 SLOT;
165 u8 reserved_16[5];
166 u8 CW_CONF;
167 #define RTL818X_CW_CONF_PERPACKET_CW_SHIFT (1 << 0)
168 #define RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT (1 << 1)
169 u8 CW_VAL;
170 u8 RATE_FALLBACK;
171 #define RTL818X_RATE_FALLBACK_ENABLE (1 << 7)
172 u8 ACM_CONTROL;
173 u8 reserved_17[24];
174 u8 CONFIG5;
175 u8 TX_DMA_POLLING;
176 u8 reserved_18[2];
177 u16 CWR;
178 u8 RETRY_CTR;
179 u8 reserved_19[3];
180 u16 INT_MIG;
181 /* RTL818X_R8187B_*: magic numbers from ioregisters */
182 #define RTL818X_R8187B_B 0
183 #define RTL818X_R8187B_D 1
184 #define RTL818X_R8187B_E 2
185 u32 RDSAR;
186 u16 TID_AC_MAP;
187 u8 reserved_20[4];
188 u8 ANAPARAM3;
189 u8 reserved_21[5];
190 u16 FEMR;
191 u8 reserved_22[4];
192 u16 TALLY_CNT;
193 u8 TALLY_SEL;
194 } __attribute__((packed));
195
196 #define MAX_RX_SIZE IEEE80211_MAX_FRAME_LEN
197
198 #define RF_PARAM_ANALOGPHY (1 << 0)
199 #define RF_PARAM_ANTBDEFAULT (1 << 1)
200 #define RF_PARAM_CARRIERSENSE1 (1 << 2)
201 #define RF_PARAM_CARRIERSENSE2 (1 << 3)
202
203 #define BB_ANTATTEN_CHAN14 0x0C
204 #define BB_ANTENNA_B 0x40
205
206 #define BB_HOST_BANG (1 << 30)
207 #define BB_HOST_BANG_EN (1 << 2)
208 #define BB_HOST_BANG_CLK (1 << 1)
209 #define BB_HOST_BANG_DATA 1
210
211 #define ANAPARAM_TXDACOFF_SHIFT 27
212 #define ANAPARAM_PWR0_SHIFT 28
213 #define ANAPARAM_PWR0_MASK (0x07 << ANAPARAM_PWR0_SHIFT)
214 #define ANAPARAM_PWR1_SHIFT 20
215 #define ANAPARAM_PWR1_MASK (0x7F << ANAPARAM_PWR1_SHIFT)
216
217 #define RTL818X_RX_RING_SIZE 8 /* doesn't have to be a power of 2 */
218 #define RTL818X_TX_RING_SIZE 8 /* nor this [but 2^n is very slightly faster] */
219 #define RTL818X_RING_ALIGN 256
220
221 #define RTL818X_MAX_RETRIES 4
222
223 enum rtl818x_tx_desc_flags {
224 RTL818X_TX_DESC_FLAG_NO_ENC = (1 << 15),
225 RTL818X_TX_DESC_FLAG_TX_OK = (1 << 15),
226 RTL818X_TX_DESC_FLAG_SPLCP = (1 << 16),
227 RTL818X_TX_DESC_FLAG_RX_UNDER = (1 << 16),
228 RTL818X_TX_DESC_FLAG_MOREFRAG = (1 << 17),
229 RTL818X_TX_DESC_FLAG_CTS = (1 << 18),
230 RTL818X_TX_DESC_FLAG_RTS = (1 << 23),
231 RTL818X_TX_DESC_FLAG_LS = (1 << 28),
232 RTL818X_TX_DESC_FLAG_FS = (1 << 29),
233 RTL818X_TX_DESC_FLAG_DMA = (1 << 30),
234 RTL818X_TX_DESC_FLAG_OWN = (1 << 31)
235 };
236
237 struct rtl818x_tx_desc {
238 u32 flags;
239 u16 rts_duration;
240 u16 plcp_len;
241 u32 tx_buf;
242 u32 frame_len;
243 u32 next_tx_desc;
244 u8 cw;
245 u8 retry_limit;
246 u8 agc;
247 u8 flags2;
248 u32 reserved[2];
249 } __attribute__ ((packed));
250
251 enum rtl818x_rx_desc_flags {
252 RTL818X_RX_DESC_FLAG_ICV_ERR = (1 << 12),
253 RTL818X_RX_DESC_FLAG_CRC32_ERR = (1 << 13),
254 RTL818X_RX_DESC_FLAG_PM = (1 << 14),
255 RTL818X_RX_DESC_FLAG_RX_ERR = (1 << 15),
256 RTL818X_RX_DESC_FLAG_BCAST = (1 << 16),
257 RTL818X_RX_DESC_FLAG_PAM = (1 << 17),
258 RTL818X_RX_DESC_FLAG_MCAST = (1 << 18),
259 RTL818X_RX_DESC_FLAG_QOS = (1 << 19), /* RTL8187(B) only */
260 RTL818X_RX_DESC_FLAG_TRSW = (1 << 24), /* RTL8187(B) only */
261 RTL818X_RX_DESC_FLAG_SPLCP = (1 << 25),
262 RTL818X_RX_DESC_FLAG_FOF = (1 << 26),
263 RTL818X_RX_DESC_FLAG_DMA_FAIL = (1 << 27),
264 RTL818X_RX_DESC_FLAG_LS = (1 << 28),
265 RTL818X_RX_DESC_FLAG_FS = (1 << 29),
266 RTL818X_RX_DESC_FLAG_EOR = (1 << 30),
267 RTL818X_RX_DESC_FLAG_OWN = (1 << 31)
268 };
269
270 struct rtl818x_rx_desc {
271 u32 flags;
272 u32 flags2;
273 union {
274 u32 rx_buf;
275 u64 tsft;
276 };
277 } __attribute__ ((packed));
278
279 struct rtl818x_priv {
280 struct rtl818x_csr *map;
281 const struct rtl818x_rf_ops *rf;
282 int rf_flag; /* whatever RF driver wishes to use it for */
283 int hw_rate;
284 int hw_rtscts_rate;
285
286 struct spi_bit_basher spibit;
287 struct spi_device eeprom;
288
289 struct rtl818x_rx_desc *rx_ring;
290 u32 rx_ring_dma;
291 unsigned int rx_idx; /* next desc to be filled by card */
292 struct io_buffer *rx_buf[RTL818X_RX_RING_SIZE];
293
294 struct rtl818x_tx_desc *tx_ring;
295 u32 tx_ring_dma;
296 unsigned int tx_cons; /* next desc to be filled by card */
297 unsigned int tx_prod; /* next desc to be filled by driver */
298 struct io_buffer *tx_buf[RTL818X_TX_RING_SIZE];
299
300 struct pci_device *pdev;
301 u32 rx_conf;
302
303 u16 txpower[14];
304
305 int r8185;
306 u32 anaparam;
307 u16 rfparam;
308 u8 csthreshold;
309 };
310
311 void rtl818x_write_phy(struct net80211_device *dev, u8 addr, u32 data);
312 void rtl818x_set_anaparam(struct rtl818x_priv *priv, u32 anaparam);
313
rtl818x_ioread8(struct rtl818x_priv * priv __unused,u8 * addr)314 static inline u8 rtl818x_ioread8(struct rtl818x_priv *priv __unused, u8 *addr)
315 {
316 return inb(addr);
317 }
318
rtl818x_ioread16(struct rtl818x_priv * priv __unused,u16 * addr)319 static inline u16 rtl818x_ioread16(struct rtl818x_priv *priv __unused, u16 *addr)
320 {
321 return inw(addr);
322 }
323
rtl818x_ioread32(struct rtl818x_priv * priv __unused,u32 * addr)324 static inline u32 rtl818x_ioread32(struct rtl818x_priv *priv __unused, u32 *addr)
325 {
326 return inl(addr);
327 }
328
rtl818x_iowrite8(struct rtl818x_priv * priv __unused,u8 * addr,u8 val)329 static inline void rtl818x_iowrite8(struct rtl818x_priv *priv __unused,
330 u8 *addr, u8 val)
331 {
332 outb(val, addr);
333 }
334
rtl818x_iowrite16(struct rtl818x_priv * priv __unused,u16 * addr,u16 val)335 static inline void rtl818x_iowrite16(struct rtl818x_priv *priv __unused,
336 u16 *addr, u16 val)
337 {
338 outw(val, addr);
339 }
340
rtl818x_iowrite32(struct rtl818x_priv * priv __unused,u32 * addr,u32 val)341 static inline void rtl818x_iowrite32(struct rtl818x_priv *priv __unused,
342 u32 *addr, u32 val)
343 {
344 outl(val, addr);
345 }
346
347 #define RTL818X_RF_DRIVERS __table(struct rtl818x_rf_ops, "rtl818x_rf_drivers")
348 #define __rtl818x_rf_driver __table_entry(RTL818X_RF_DRIVERS, 01)
349
350 struct rtl818x_rf_ops {
351 char *name;
352 u8 id; /* as identified in EEPROM */
353 void (*init)(struct net80211_device *dev);
354 void (*stop)(struct net80211_device *dev);
355 void (*set_chan)(struct net80211_device *dev, struct net80211_channel *chan);
356 void (*conf_erp)(struct net80211_device *dev); /* set based on dev->erp_flags */
357 };
358
359 #endif /* RTL818X_H */
360