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Searched refs:RegionBegin (Results 1 – 6 of 6) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DScheduleDAGInstrs.h129 MachineBasicBlock::iterator RegionBegin; variable
253 MachineBasicBlock::iterator begin() const { return RegionBegin; } in begin()
/external/llvm/lib/CodeGen/
DPostRASchedulerList.cpp397 AntiDepBreak->BreakAntiDependencies(SUnits, RegionBegin, RegionEnd, in schedule()
675 RegionBegin = RegionEnd; in EmitSchedule()
692 RegionBegin = std::prev(RegionEnd); in EmitSchedule()
DMachineScheduler.cpp647 if (&*RegionBegin == MI) in moveInstruction()
648 ++RegionBegin; in moveInstruction()
658 if (RegionBegin == InsertPos) in moveInstruction()
659 RegionBegin = MI; in moveInstruction()
807 CurrentTop = nextIfDebug(RegionBegin, RegionEnd); in initQueues()
826 BB->splice(RegionBegin, BB, FirstDbgValue); in placeDebugValues()
827 RegionBegin = FirstDbgValue; in placeDebugValues()
835 if (&*RegionBegin == DbgValue) in placeDebugValues()
836 ++RegionBegin; in placeDebugValues()
892 TopRPTracker.init(&MF, RegClassInfo, LIS, BB, RegionBegin, in initRegPressure()
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DScheduleDAGInstrs.cpp230 RegionBegin = begin; in enterRegion()
648 for (MachineInstr &MI : llvm::make_range(RegionBegin, RegionEnd)) { in initSUnits()
913 for (MachineBasicBlock::iterator MII = RegionEnd, MIE = RegionBegin; in buildSchedGraph()
/external/llvm/lib/Target/AMDGPU/
DSIMachineScheduler.h444 RPTracker.init(&MF, RegClassInfo, LIS, BB, RegionBegin, false, false); in initRPTracker()
DSIMachineScheduler.cpp1880 assert(TopRPTracker.getPos() == RegionBegin && "bad initial Top tracker"); in schedule()