| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringX8664Traits.h | 70 using RegisterSet = ::Ice::RegX8664; member
71 static constexpr RegisterSet::AllRegisters StackPtr = RegX8664::Reg_rsp;
72 static constexpr RegisterSet::AllRegisters FramePtr = RegX8664::Reg_rbp;
305 static const char *const RegNames[RegisterSet::Reg_NUM] = { in getRegName()
318 static const GPRRegister GPRRegs[RegisterSet::Reg_NUM] = { in getEncodedGPR()
332 static const ByteRegister ByteRegs[RegisterSet::Reg_NUM] = { in getEncodedByteReg()
346 static const XmmRegister XmmRegs[RegisterSet::Reg_NUM] = { in getEncodedXmm()
360 static const uint32_t Encoding[RegisterSet::Reg_NUM] = { in getEncoding()
373 static const RegNumT BaseRegs[RegisterSet::Reg_NUM] = { in getBaseReg()
377 RegisterSet::base, in getBaseReg()
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| D | IceTargetLoweringX8632Traits.h | 70 using RegisterSet = ::Ice::RegX8632; member
71 static constexpr RegisterSet::AllRegisters StackPtr = RegX8632::Reg_esp;
72 static constexpr RegisterSet::AllRegisters FramePtr = RegX8632::Reg_ebp;
280 static const char *const RegNames[RegisterSet::Reg_NUM] = { in getRegName()
293 static const GPRRegister GPRRegs[RegisterSet::Reg_NUM] = { in getEncodedGPR()
307 static const ByteRegister ByteRegs[RegisterSet::Reg_NUM] = { in getEncodedByteReg()
321 static const XmmRegister XmmRegs[RegisterSet::Reg_NUM] = { in getEncodedXmm()
335 static const uint32_t Encoding[RegisterSet::Reg_NUM] = { in getEncoding()
348 static const RegNumT BaseRegs[RegisterSet::Reg_NUM] = { in getBaseReg()
352 RegisterSet::base, in getBaseReg()
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| D | IceTargetLoweringX8664.cpp | 124 TargetX86Base<X8664::Traits>::Traits::RegisterSet::Reg_NUM>
145 getPhysicalRegister(Traits::RegisterSet::Reg_rsp, IceType_i64); in _add_sp()
152 getPhysicalRegister(Traits::RegisterSet::Reg_esp, IceType_i32); in _add_sp()
154 getPhysicalRegister(Traits::RegisterSet::Reg_r15, IceType_i64); in _add_sp()
188 Variable *esp = getPhysicalRegister(Traits::RegisterSet::Reg_esp); in _mov_sp()
190 getPhysicalRegister(Traits::RegisterSet::Reg_rsp, IceType_i64); in _mov_sp()
203 getPhysicalRegister(Traits::RegisterSet::Reg_r15, IceType_i64); in _mov_sp()
212 getPhysicalRegister(Traits::RegisterSet::Reg_ebp, IceType_i32); in _push_rbp()
214 getPhysicalRegister(Traits::RegisterSet::Reg_rsp, IceType_i64); in _push_rbp()
234 getPhysicalRegister(Traits::RegisterSet::Reg_esp, IceType_i32); in _link_bp()
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| D | IceTargetLoweringX8632.cpp | 137 TargetX86Base<X8632::Traits>::Traits::RegisterSet::Reg_NUM>
157 Variable *esp = getPhysicalRegister(Traits::RegisterSet::Reg_esp); in _add_sp()
162 Variable *esp = getPhysicalRegister(Traits::RegisterSet::Reg_esp); in _mov_sp()
206 Variable *esp = getPhysicalRegister(Traits::RegisterSet::Reg_esp); in _sub_sp()
214 Variable *ebp = getPhysicalRegister(Traits::RegisterSet::Reg_ebp); in _link_bp()
215 Variable *esp = getPhysicalRegister(Traits::RegisterSet::Reg_esp); in _link_bp()
223 Variable *esp = getPhysicalRegister(Traits::RegisterSet::Reg_esp); in _unlink_bp()
224 Variable *ebp = getPhysicalRegister(Traits::RegisterSet::Reg_ebp); in _unlink_bp()
260 : getPhysicalRegister(Traits::RegisterSet::Reg_eax); in emitGetIP()
365 return legalizeToReg(Value, Traits::RegisterSet::Reg_xmm0); in moveReturnValueToRegister()
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| D | IceInstX8664.cpp | 285 (getBase()->getRegNum() == Traits::RegisterSet::Reg_r15) || in toAsmAddress()
286 (getBase()->getRegNum() == Traits::RegisterSet::Reg_rsp) || in toAsmAddress()
287 (getBase()->getRegNum() == Traits::RegisterSet::Reg_rbp)); in toAsmAddress()
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| D | IceInstX86BaseImpl.h | 233 assert(Edx->getRegNum() == RegisterSet::Reg_edx); in InstX86Cmpxchg8b()
234 assert(Eax->getRegNum() == RegisterSet::Reg_eax); in InstX86Cmpxchg8b()
235 assert(Ecx->getRegNum() == RegisterSet::Reg_ecx); in InstX86Cmpxchg8b()
236 assert(Ebx->getRegNum() == RegisterSet::Reg_ebx); in InstX86Cmpxchg8b()
868 assert(llvm::cast<Variable>(Src2Op)->getRegNum() == RegisterSet::Reg_cl); in emitIASGPRShiftDouble()
1141 RegisterSet::Reg_xmm0); in emitVariableBlendInst()
1153 RegisterSet::Reg_xmm0); in emitIASVariableBlendInst()
1198 assert(Src0Var->getRegNum() == RegisterSet::Reg_al); in emit()
1225 assert(Src0Var->getRegNum() == RegisterSet::Reg_al); in emitIAS()
1300 assert(SrcReg == RegisterSet::Reg_al); in emit()
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| D | IceTargetLoweringX86BaseImpl.h | 410 RegNumT::setLimit(Traits::RegisterSet::Reg_NUM);
414 filterTypeToRegisterSet(Ctx, Traits::RegisterSet::Reg_NUM,
920 PhysicalRegisters[Ty].resize(Traits::RegisterSet::Reg_NUM);
1848 T_1 = copyToReg8(Src1Lo, Traits::RegisterSet::Reg_cl);
2023 Variable *T_4Lo = makeReg(IceType_i32, Traits::RegisterSet::Reg_eax);
2024 Variable *T_4Hi = makeReg(IceType_i32, Traits::RegisterSet::Reg_edx);
2039 _mov(T_3, Src0Lo, Traits::RegisterSet::Reg_eax);
2276 _mov(T, Src0, Traits::RegisterSet::Reg_al);
2294 Src1 = copyToReg8(Src1, Traits::RegisterSet::Reg_cl);
2302 Src1 = copyToReg8(Src1, Traits::RegisterSet::Reg_cl);
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| /external/llvm/lib/Target/Hexagon/ |
| D | RDFLiveness.h | 33 typedef std::map<MachineBasicBlock*,RegisterSet> LiveMapType;
41 bool FullChain = false, const RegisterSet &DefRRs = RegisterSet());
46 const RegisterSet &DefRRs = RegisterSet());
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| D | HexagonBitSimplify.cpp | 33 struct RegisterSet : private BitVector { struct
34 RegisterSet() : BitVector() {} in RegisterSet() function
35 explicit RegisterSet(unsigned s, bool t = false) : BitVector(s, t) {} in RegisterSet() argument
36 RegisterSet(const RegisterSet &RS) : BitVector(RS) {} in RegisterSet() argument
55 RegisterSet &insert(unsigned R) { in insert() argument
58 return static_cast<RegisterSet&>(BitVector::set(Idx)); in insert()
60 RegisterSet &remove(unsigned R) { in remove() argument
64 return static_cast<RegisterSet&>(BitVector::reset(Idx)); in remove()
67 RegisterSet &insert(const RegisterSet &Rs) { in insert() argument
68 return static_cast<RegisterSet&>(BitVector::operator|=(Rs)); in insert()
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| D | HexagonGenInsert.cpp | 77 struct RegisterSet : private BitVector { struct
78 RegisterSet() = default;
79 explicit RegisterSet(unsigned s, bool t = false) : BitVector(s, t) {} in RegisterSet() argument
97 RegisterSet &insert(unsigned R) { in insert() argument
100 return static_cast<RegisterSet&>(BitVector::set(Idx)); in insert()
102 RegisterSet &remove(unsigned R) { in remove() argument
106 return static_cast<RegisterSet&>(BitVector::reset(Idx)); in remove()
109 RegisterSet &insert(const RegisterSet &Rs) { in insert() argument
110 return static_cast<RegisterSet&>(BitVector::operator|=(Rs)); in insert()
112 RegisterSet &remove(const RegisterSet &Rs) { in remove() argument
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| D | RDFLiveness.cpp | 88 NodeAddr<RefNode*> RefA, bool FullChain, const RegisterSet &DefRRs) { in getAllReachingDefs()
193 RegisterSet RRs = DefRRs; in getAllReachingDefs()
233 static const RegisterSet NoRegs;
244 RegisterSet DefRRs; in getAllReachingDefsRec()
282 NodeAddr<DefNode*> DefA, const RegisterSet &DefRRs) { in getAllReachedUses()
314 RegisterSet NewDefRRs = DefRRs; in getAllReachedUses()
336 std::map<NodeId,std::map<NodeId,RegisterSet>> PhiUp; in computePhiInfo()
429 RegisterSet DefRRs; in computePhiInfo()
445 << Print<RegisterSet>(R.second, DFG); in computePhiInfo()
485 RegisterSet UpReached; in computePhiInfo()
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| D | HexagonBlockRanges.cpp | 243 HexagonBlockRanges::RegisterSet HexagonBlockRanges::getLiveIns( in getLiveIns()
245 RegisterSet LiveIns; in getLiveIns()
253 HexagonBlockRanges::RegisterSet HexagonBlockRanges::expandToSubRegs( in expandToSubRegs()
256 RegisterSet SRs; in expandToSubRegs()
286 RegisterSet LiveOnEntry; in computeInitialLiveRanges()
341 RegisterSet LiveOnExit; in computeInitialLiveRanges()
351 RegisterSet Left; in computeInitialLiveRanges()
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| D | HexagonBlockRanges.h | 41 typedef std::set<RegisterRef> RegisterSet; typedef
139 static RegisterSet expandToSubRegs(RegisterRef R,
153 RegisterSet getLiveIns(const MachineBasicBlock &B);
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| D | HexagonRDF.h | 22 bool covers(const RegisterSet &RRs, RegisterRef RR) const override;
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| D | HexagonRDF.cpp | 37 bool HexagonRegisterAliasInfo::covers(const RegisterSet &RRs, RegisterRef RR) in covers()
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| D | RDFGraph.cpp | 280 raw_ostream &operator<< (raw_ostream &OS, const Print<RegisterSet> &P) { in operator <<()
593 bool RegisterAliasInfo::covers(const RegisterSet &RRs, RegisterRef RR) const { in covers()
1009 RegisterSet Defined; in pushDefs()
1193 RegisterSet ImpUses, ImpDefs; in buildStmt()
1209 RegisterSet DoneDefs; in buildStmt()
1309 RegisterSet Defs; in recordDefsForDF()
1330 RegisterSet &Refs = RefM[BA.Id]; in recordDefsForDF()
1357 auto MaxCoverIn = [this] (RegisterRef RR, RegisterSet &RRs) -> RegisterRef { in buildPhis()
1364 RegisterSet MaxDF; in buildPhis()
1500 RegisterSet Defs; in linkRefUp()
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| D | RDFGraph.h | 386 typedef std::set<RegisterRef> RegisterSet; typedef
395 virtual bool covers(const RegisterSet &RRs, RegisterRef RR) const;
764 typedef std::map<NodeId,RegisterSet> BlockRefsMap;
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| /external/google-breakpad/src/processor/ |
| D | cfi_frame_info.h | 213 struct RegisterSet { struct
243 SimpleCFIWalker(const RegisterSet *register_map, size_t map_size) in SimpleCFIWalker()
267 const RegisterSet *register_map_;
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| D | cfi_frame_info-inl.h | 59 const RegisterSet &r = register_map_[i]; in FindCallerRegisters()
74 const RegisterSet &r = register_map_[i]; in FindCallerRegisters()
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| D | stackwalker_amd64.h | 98 static const CFIWalker::RegisterSet cfi_register_map_[];
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| D | stackwalker_x86.h | 107 static const CFIWalker::RegisterSet cfi_register_map_[];
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| D | cfi_frame_info_unittest.cc | 473 static CFIWalker::RegisterSet register_map[7];
480 SimpleCFIWalkerFixture::CFIWalker::RegisterSet
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| D | stackwalker_amd64.cc | 51 const StackwalkerAMD64::CFIWalker::RegisterSet
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| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| D | nv50_ir_ra.cpp | 49 class RegisterSet class
52 RegisterSet(const Target *);
58 void intersect(DataFile f, const RegisterSet *);
118 RegisterSet::reset(DataFile f, bool resetMax) in reset()
126 RegisterSet::init(const Target *targ) in init()
138 RegisterSet::RegisterSet(const Target *targ) in RegisterSet() function in nv50_ir::RegisterSet
147 RegisterSet::periodicMask(DataFile f, uint32_t lock, uint32_t unlock) in periodicMask()
153 RegisterSet::intersect(DataFile f, const RegisterSet *set) in intersect()
159 RegisterSet::print(DataFile f) const in print()
167 RegisterSet::assign(int32_t& reg, DataFile f, unsigned int size) in assign()
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| /external/llvm/utils/TableGen/ |
| D | AsmMatcherEmitter.cpp | 136 typedef std::set<Record*, LessRecordByID> RegisterSet; typedef
198 RegisterSet Registers;
234 RegisterSet Tmp; in isRelatedTo()
235 std::insert_iterator<RegisterSet> II(Tmp, Tmp.begin()); in isRelatedTo()
1190 bool operator() (const RegisterSet &LHS, const RegisterSet & RHS) const { in operator ()()
1206 typedef std::set<RegisterSet, LessRegisterSet> RegisterSetSet; in buildRegisterClasses()
1214 RegisterSet(RC.getOrder().begin(), RC.getOrder().end())); in buildRegisterClasses()
1218 RegisterSets.insert(RegisterSet(&Rec, &Rec + 1)); in buildRegisterClasses()
1224 std::map<Record*, RegisterSet> RegisterMap; in buildRegisterClasses()
1227 RegisterSet ContainingSet; in buildRegisterClasses()
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