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Searched refs:Regs64bit (Results 1 – 2 of 2) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelLowering.cpp10548 bool Regs64bit = T == MVT::i128; in ReplaceNodeResults() local
10549 EVT HalfT = Regs64bit ? MVT::i64 : MVT::i32; in ReplaceNodeResults()
10556 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
10559 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
10567 Regs64bit ? X86::RBX : X86::EBX, in ReplaceNodeResults()
10570 Regs64bit ? X86::RCX : X86::ECX, in ReplaceNodeResults()
10577 unsigned Opcode = Regs64bit ? X86ISD::LCMPXCHG16_DAG : in ReplaceNodeResults()
10582 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
10585 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp21945 bool Regs64bit = T == MVT::i128; in ReplaceNodeResults() local
21946 MVT HalfT = Regs64bit ? MVT::i64 : MVT::i32; in ReplaceNodeResults()
21953 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
21956 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
21964 DAG.getCopyToReg(cpInH.getValue(0), dl, Regs64bit ? X86::RCX : X86::ECX, in ReplaceNodeResults()
21985 assert(((Regs64bit == (BasePtr == X86::RBX)) || BasePtr == X86::EBX) && in ReplaceNodeResults()
21987 unsigned Opcode = Regs64bit ? X86ISD::LCMPXCHG16_SAVE_RBX_DAG in ReplaceNodeResults()
21990 Regs64bit ? X86::RBX : X86::EBX, in ReplaceNodeResults()
21998 Regs64bit ? X86ISD::LCMPXCHG16_DAG : X86ISD::LCMPXCHG8_DAG; in ReplaceNodeResults()
22000 Regs64bit ? X86::RBX : X86::EBX, swapInL, in ReplaceNodeResults()
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