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Searched refs:ReservedRegs (Results 1 – 6 of 6) sorted by relevance

/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DRegisterScavenging.h64 BitVector ReservedRegs; variable
129 bool isReserved(unsigned Reg) const { return ReservedRegs.test(Reg); } in isReserved()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DDeadMachineInstructionElim.cpp92 BitVector ReservedRegs = TRI->getReservedRegs(MF); in runOnMachineFunction() local
102 LivePhysRegs = ReservedRegs; in runOnMachineFunction()
DRegisterScavenging.cpp63 RegsAvailable ^= ReservedRegs; in initRegState()
95 ReservedRegs = TRI->getReservedRegs(MF); in enterBasicBlock()
235 used = ~RegsAvailable & ~ReservedRegs; in getRegsUsed()
DPostRASchedulerList.cpp441 BitVector ReservedRegs = TRI->getReservedRegs(MF); in FixupKills() local
482 if ((Reg == 0) || ReservedRegs.test(Reg)) continue; in FixupKills()
518 if ((Reg == 0) || ReservedRegs.test(Reg)) continue; in FixupKills()
/external/llvm/include/llvm/CodeGen/
DMachineRegisterInfo.h105 BitVector ReservedRegs; variable
746 return !ReservedRegs.empty(); in reservedRegsFrozen()
753 return !reservedRegsFrozen() || ReservedRegs.test(PhysReg); in canReserveReg()
763 return ReservedRegs; in getReservedRegs()
/external/llvm/lib/CodeGen/
DMachineRegisterInfo.cpp442 ReservedRegs = getTargetRegisterInfo()->getReservedRegs(MF); in freezeReservedRegs()
443 assert(ReservedRegs.size() == getTargetRegisterInfo()->getNumRegs() && in freezeReservedRegs()