Searched refs:RetReg (Results 1 – 8 of 8) sorted by relevance
| /external/clang/lib/StaticAnalyzer/Checkers/ |
| D | DynamicTypePropagation.cpp | 207 const MemRegion *RetReg = Call.getReturnValue().getAsRegion(); in checkPostCall() local
208 if (!RetReg) in checkPostCall()
231 C.addTransition(setDynamicTypeInfo(State, RetReg, DynResTy, false)); in checkPostCall()
241 C.addTransition(setDynamicTypeInfo(State, RetReg, RecDynType)); in checkPostCall()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 1630 unsigned RetReg = VA.getLocReg(); in SelectRet() local
1639 TII.get(TargetOpcode::COPY), RetReg).addReg(SrcReg); in SelectRet()
1641 RetRegs.push_back(RetReg); in SelectRet()
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| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1118 unsigned RetReg = SP::I7; in LowerRETURNADDR() local
1124 RetAddr = DAG.getCopyFromReg(DAG.getEntryNode(), dl, RetReg, VT); in LowerRETURNADDR()
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| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 1259 unsigned RetReg = Subtarget->is64Bit() ? X86::RAX : X86::EAX; in X86SelectRet() local
1261 TII.get(TargetOpcode::COPY), RetReg).addReg(Reg); in X86SelectRet()
1262 RetRegs.push_back(RetReg); in X86SelectRet()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 2682 unsigned RetReg = MF.addLiveIn(SP::I7, TLI.getRegClassFor(PtrVT)); in LowerRETURNADDR() local
2683 RetAddr = DAG.getCopyFromReg(DAG.getEntryNode(), dl, RetReg, VT); in LowerRETURNADDR()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.td | 1336 Register RetReg, RegisterOperand ResRO = RO>:
1338 PseudoInstExpansion<(JALRInst RetReg, ResRO:$rs)>;
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64FastISel.cpp | 3764 for (unsigned RetReg : RetRegs) in selectRet() local
3765 MIB.addReg(RetReg, RegState::Implicit); in selectRet()
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringMIPS32.cpp | 3561 Variable *RetReg = nullptr; in lowerCall() local
3562 NewCall = InstMIPS32Call::create(Func, RetReg, CallTarget); in lowerCall()
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