| /external/compiler-rt/test/asan/TestCases/Linux/ |
| D | sized_delete_test.cc | 21 struct S20 { struct
63 Del12Ar(reinterpret_cast<S12*>(new S20[100])); in main()
64 Del12NoThrow(reinterpret_cast<S12*>(new S20)); in main()
65 Del12ArNoThrow(reinterpret_cast<S12*>(new S20[100])); in main()
72 Del12(reinterpret_cast<S12*>(new S20)); in main()
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| /external/clang/test/PCH/ |
| D | cxx-key-functions.cpp | 28 struct S20 { virtual void f(); }; struct
84 S20, S21, S22, S23, S24, S25, S26, S27, S28, S29,
|
| /external/vulkan-validation-layers/libs/glm/detail/ |
| D | type_mat3x3.inl | 444 T S20 = m[2][0]; local
450 - (S10 * S22 - S20 * S12),
451 + (S10 * S21 - S20 * S11),
453 + (S00 * S22 - S20 * S02),
454 - (S00 * S21 - S20 * S01),
461 S12 * S20 - S22 * S10,
462 S10 * S21 - S20 * S11,
464 S00 * S22 - S02 * S20,
465 S01 * S20 - S00 * S21,
473 + S20 * (S01 * S12 - S11 * S02);
|
| /external/clang/test/CodeGenCXX/ |
| D | microsoft-abi-static-initializers.cpp | 79 static S S20; in MultipleStatics() local
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 176 case S20: case D20: return 20; in getARMRegisterNumbering()
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMRegisterInfo.td | 84 def S20 : ARMFReg<20, "s20">; def S21 : ARMFReg<21, "s21">;
103 def D10 : ARMReg<10, "d10", [S20, S21]>, DwarfRegNum<[266]>;
|
| D | ARMCallingConv.td | 96 CCIfType<[f32], CCAssignToReg<[S16, S17, S18, S19, S20, S21, S22, S23]>>,
|
| D | ARMBaseRegisterInfo.cpp | 715 case ARM::S21: return ARM::S20; in getRegisterPairEven()
768 case ARM::S20: return ARM::S21; in getRegisterPairOdd()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 107 case AArch64::S20: in isOdd()
|
| D | AArch64RegisterInfo.td | 305 def S20 : AArch64Reg<20, "s20", [H20]>, DwarfRegAlias<B20>;
340 def D20 : AArch64Reg<20, "d20", [S20], ["v20", ""]>, DwarfRegAlias<B20>;
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMRegisterInfo.td | 91 def S20 : ARMFReg<20, "s20">; def S21 : ARMFReg<21, "s21">;
110 def D10 : ARMReg<10, "d10", [S20, S21]>, DwarfRegNum<[266]>;
|
| D | ARMCallingConv.td | 112 CCIfType<[f32], CCAssignToReg<[S16, S17, S18, S19, S20, S21, S22, S23]>>,
|
| /external/iptables/utils/ |
| D | pf.os | 242 S20:64:1:60:M*,S,T,N,W0: Linux:2.2:20-25:Linux 2.2.20 and newer
430 S20:128:1:48:M*,N,N,S: Windows:2000::Windows 2000/XP SP3
431 S20:128:1:48:M*,N,N,S: Windows:XP:SP3:Windows 2000/XP SP3
|
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 310 AArch64::S20, AArch64::S21, AArch64::S22, AArch64::S23, AArch64::S24,
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 917 ARM::S20, ARM::S21, ARM::S22, ARM::S23,
|
| /external/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 996 ARM::S20, ARM::S21, ARM::S22, ARM::S23,
|