| /external/llvm/test/CodeGen/AMDGPU/ |
| D | unsupported-cc.ll | 56 ; CHECK-NEXT: SETGT {{\*? *}}T{{[0-9]+\.[XYZW]}}, {{literal\.[xy]}}, KC0[2].Z
91 ; CHECK: SETGT * T{{[0-9]}}.[[CHAN:[XYZW]]], KC0[2].Z, literal.x
105 ; CHECK-NEXT: SETGT {{\*? *}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, {{literal\.[xy]}}
|
| D | setcc.ll | 156 ; R600: SETGT
184 ; R600: SETGT
|
| D | sdiv.ll | 10 ; selectcc Remainder -1, 0, -1, SETGT
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | Analysis.cpp | 156 case FCmpInst::FCMP_OGT: FOC = ISD::SETGT; FPC = ISD::SETOGT; break; in getFCmpCondCode()
164 case FCmpInst::FCMP_UGT: FOC = ISD::SETGT; FPC = ISD::SETUGT; break; in getFCmpCondCode()
194 case ICmpInst::ICMP_SGT: return ISD::SETGT; in getICmpCondCode()
|
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 733 SETGT, // 1 X 0 1 0 True if greater than enumerator
746 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 871 SETGT, // 1 X 0 1 0 True if greater than enumerator
884 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSelectCCInfo.td | 25 IntRegs:$fval, SETGT)),
102 DoubleRegs:$fval, SETGT)),
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 561 case ISD::SETGT: return PPC::PRED_GT; in getPredicateForSetCC()
586 case ISD::SETGT: return 1; // Bit #1 = SETOGT in getCRIdxForSetCC()
641 case ISD::SETGT: { in SelectSETCC()
678 case ISD::SETGT: { in SelectSETCC()
|
| /external/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 190 case ISD::SETOGT: case ISD::SETUGT: return ISD::SETGT; in getFCmpCodeWithoutNaN()
209 case ICmpInst::ICMP_SGT: return ISD::SETGT; in getICmpCondCode()
|
| D | TargetLoweringBase.cpp | 783 CCs[RTLIB::OGT_F32] = ISD::SETGT; in InitCmpLibcallCCs()
784 CCs[RTLIB::OGT_F64] = ISD::SETGT; in InitCmpLibcallCCs()
785 CCs[RTLIB::OGT_F128] = ISD::SETGT; in InitCmpLibcallCCs()
786 CCs[RTLIB::OGT_PPCF128] = ISD::SETGT; in InitCmpLibcallCCs()
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInteger.td | 50 defm GT_S : ComparisonInt<SETGT, "gt_s">;
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 535 CCs[RTLIB::OGT_F32] = ISD::SETGT; in InitCmpLibcallCCs()
536 CCs[RTLIB::OGT_F64] = ISD::SETGT; in InitCmpLibcallCCs()
2088 case ISD::SETGT: in SimplifySetCC()
2244 (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT); in SimplifySetCC()
2259 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C1 == MaxVal) in SimplifySetCC()
2265 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C1 == MinVal) in SimplifySetCC()
2277 else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C1 == MaxVal-1) in SimplifySetCC()
2298 return DAG.getSetCC(dl, VT, N0, ConstMinusOne, ISD::SETGT); in SimplifySetCC()
2546 case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> ~X & Y in SimplifySetCC()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 2106 case ISD::SETGT: return PPC::PRED_GT; in getPredicateForSetCC()
2127 case ISD::SETGT: return 1; // Bit #1 = SETOGT in getCRIdxForSetCC()
2161 case ISD::SETLT: CC = ISD::SETGT; Swap = true; break; in getVCmpInst()
2185 case ISD::SETGT: in getVCmpInst()
2207 case ISD::SETLT: CC = ISD::SETGT; Swap = true; break; in getVCmpInst()
2216 case ISD::SETLE: CC = ISD::SETGT; Negate = true; break; in getVCmpInst()
2233 case ISD::SETGT: in getVCmpInst()
2298 case ISD::SETGT: { in trySETCC()
2341 case ISD::SETGT: { in trySETCC()
|
| D | PPCInstrQPX.td | 1025 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETGT),
1072 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETGT),
1131 def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETGT)),
1152 def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETGT)),
1173 def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETGT)),
|
| D | PPCInstrInfo.td | 3004 def : Pat<(i1 (setcc i1:$s1, i1:$s2, SETGT)),
3104 defm : ExtSetCCPat<SETGT,
3136 defm : ExtSetCCPat<SETGT,
3159 def : Pat<(i1 (setcc i32:$s1, imm32SExt16:$imm, SETGT)),
3204 def : Pat<(i1 (setcc i32:$s1, i32:$s2, SETGT)),
3227 def : Pat<(i1 (setcc i64:$s1, imm64SExt16:$imm, SETGT)),
3272 def : Pat<(i1 (setcc i64:$s1, i64:$s2, SETGT)),
3295 def : Pat<(i1 (setcc f32:$s1, f32:$s2, SETGT)),
3326 def : Pat<(i1 (setcc f64:$s1, f64:$s2, SETGT)),
3379 def : Pat <(i1 (selectcc i1:$lhs, i1:$rhs, i1:$tval, i1:$fval, SETGT)),
[all …]
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 191 case ISD::SETGT: in softenSetCCOperands()
1583 case ISD::SETGT: in SimplifySetCC()
1752 ISD::CondCode NewCC = (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT; in SimplifySetCC()
1782 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C1 == MaxVal) in SimplifySetCC()
1788 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C1 == MinVal) in SimplifySetCC()
1800 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C1 == MaxVal-1) in SimplifySetCC()
1821 return DAG.getSetCC(dl, VT, N0, ConstMinusOne, ISD::SETGT); in SimplifySetCC()
2142 case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> ~X & Y in SimplifySetCC()
3136 ISD::SETGT); in expandFP_TO_SINT()
|
| D | SelectionDAGDumper.cpp | 348 case ISD::SETGT: return "setgt"; in getOperationName()
|
| D | LegalizeIntegerTypes.cpp | 981 case ISD::SETGT: in PromoteSetCCOperands()
1681 return std::make_pair(ISD::SETGT, ISD::UMAX); in getExpandedMinMaxOps()
2823 (CCCode == ISD::SETGT && CST->isAllOnesValue())) { // X > -1 in IntegerExpandSetCCOperands()
2835 case ISD::SETGT: in IntegerExpandSetCCOperands()
2875 (CCCode == ISD::SETLT || CCCode == ISD::SETGT || in IntegerExpandSetCCOperands()
2902 case ISD::SETGT: CCCode = ISD::SETLT; FlipOperands = true; break; in IntegerExpandSetCCOperands()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructions.td | 96 [{return N->get() == ISD::SETOGT || N->get() == ISD::SETGT;}]
140 def COND_SGT : PatLeaf <(cond), [{return N->get() == ISD::SETGT;}]>;
|
| D | R600Instructions.td | 705 0x09, "SETGT",
808 [(set i32:$dst, (selectcc i32:$src0, i32:$src1, -1, 0, SETGT))]
1661 def : CND_INT_f32 <CNDGT_INT, SETGT>;
|
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| D | AlphaISelDAGToDAG.cpp | 317 case ISD::SETGT: case ISD::SETOGT: case ISD::SETUGT: in Select()
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| D | MBlazeInstrInfo.td | 760 def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETGT),
797 (i32 GPR:$T), (i32 GPR:$F), SETGT),
834 def : Pat<(brcond (setcc (i32 GPR:$L), (i32 GPR:$R), SETGT), bb:$T),
|
| D | MBlazeInstrFPU.td | 157 def : Pat<(setcc (f32 GPR:$L), (f32 GPR:$R), SETGT),
|
| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 536 case ISD::SETGT: in EmitInstrWithCustomInserter()
|
| /external/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 1864 X86_INTRINSIC_DATA(sse_comigt_ss, COMI, X86ISD::COMI, ISD::SETGT),
1876 X86_INTRINSIC_DATA(sse_ucomigt_ss, COMI, X86ISD::UCOMI, ISD::SETGT),
1882 X86_INTRINSIC_DATA(sse2_comigt_sd, COMI, X86ISD::COMI, ISD::SETGT),
1926 X86_INTRINSIC_DATA(sse2_ucomigt_sd, COMI, X86ISD::UCOMI, ISD::SETGT),
|