Searched refs:SHIFT_BY_REG (Results 1 – 2 of 2) sorted by relevance
/external/valgrind/VEX/priv/ |
D | guest_x86_toIR.c | 6069 # define SHIFT_BY_REG(_name,_op) \ in dis_MMX() macro 6074 case 0xF1: SHIFT_BY_REG("psllw", Iop_ShlN16x4); in dis_MMX() 6075 case 0xF2: SHIFT_BY_REG("pslld", Iop_ShlN32x2); in dis_MMX() 6076 case 0xF3: SHIFT_BY_REG("psllq", Iop_Shl64); in dis_MMX() 6079 case 0xD1: SHIFT_BY_REG("psrlw", Iop_ShrN16x4); in dis_MMX() 6080 case 0xD2: SHIFT_BY_REG("psrld", Iop_ShrN32x2); in dis_MMX() 6081 case 0xD3: SHIFT_BY_REG("psrlq", Iop_Shr64); in dis_MMX() 6084 case 0xE1: SHIFT_BY_REG("psraw", Iop_SarN16x4); in dis_MMX() 6085 case 0xE2: SHIFT_BY_REG("psrad", Iop_SarN32x2); in dis_MMX() 6087 # undef SHIFT_BY_REG in dis_MMX()
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D | guest_amd64_toIR.c | 7741 # define SHIFT_BY_REG(_name,_op) \ in dis_MMX() macro 7746 case 0xF1: SHIFT_BY_REG("psllw", Iop_ShlN16x4); in dis_MMX() 7747 case 0xF2: SHIFT_BY_REG("pslld", Iop_ShlN32x2); in dis_MMX() 7748 case 0xF3: SHIFT_BY_REG("psllq", Iop_Shl64); in dis_MMX() 7751 case 0xD1: SHIFT_BY_REG("psrlw", Iop_ShrN16x4); in dis_MMX() 7752 case 0xD2: SHIFT_BY_REG("psrld", Iop_ShrN32x2); in dis_MMX() 7753 case 0xD3: SHIFT_BY_REG("psrlq", Iop_Shr64); in dis_MMX() 7756 case 0xE1: SHIFT_BY_REG("psraw", Iop_SarN16x4); in dis_MMX() 7757 case 0xE2: SHIFT_BY_REG("psrad", Iop_SarN32x2); in dis_MMX() 7759 # undef SHIFT_BY_REG in dis_MMX()
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