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Searched refs:SI_SH_REG_END (Results 1 – 5 of 5) sorted by relevance

/external/mesa3d/src/amd/vulkan/
Dradv_cs.h84 assert(reg >= SI_SH_REG_OFFSET && reg < SI_SH_REG_END); in radeon_set_sh_reg_seq()
/external/mesa3d/src/gallium/drivers/radeon/
Dr600_cs.h172 assert(reg >= SI_SH_REG_OFFSET && reg < SI_SH_REG_END); in radeon_set_sh_reg_seq()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_pm4.c64 } else if (reg >= SI_SH_REG_OFFSET && reg < SI_SH_REG_END) { in si_pm4_set_reg()
/external/mesa3d/src/amd/common/
Dr600d_common.h32 #define SI_SH_REG_END 0x0000C000 macro
Dsid.h31 #define SI_SH_REG_END 0x0000C000 macro