Searched refs:SMINV (Results 1 – 5 of 5) sorted by relevance
| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.stdout.exp | 27700 SMINV v8, v7.4s 828a65df98097e7a60121e36b3576955 000000000000000000000000828a65df
27701 SMINV v8, v7.4s f6ebc3e34a453228fef2bf9168f5830b 000000000000000000000000f6ebc3e3
27702 SMINV v8, v7.4s 4422a93c78f3ac5492187d0be564a876 00000000000000000000000092187d0b
27703 SMINV v8, v7.4s b62a8186ac4e98d8e80043bd376303f4 000000000000000000000000ac4e98d8
27704 SMINV v8, v7.4s 9800b95b7494a191cb27fcc669acc1df 0000000000000000000000009800b95b
27705 SMINV v8, v7.4s 5b9c1f5debf943705dc8750327268bac 000000000000000000000000ebf94370
27706 SMINV v8, v7.4s 24a19dfc284d6770df69597cff20001d 000000000000000000000000df69597c
27707 SMINV v8, v7.4s 2825b40b221d43677ab92ceba1b8317e 000000000000000000000000a1b8317e
27708 SMINV v8, v7.4s b424d02366a58231f836d96f19a84b2a 000000000000000000000000b424d023
27709 SMINV v8, v7.4s 129a5de27f20d0ab265b4b2173ac7a7f 000000000000000000000000129a5de2
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 153 SMINV, enumerator
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| D | AArch64ISelLowering.cpp | 910 case AArch64ISD::SMINV: return "AArch64ISD::SMINV"; in getTargetNodeName()
8547 return combineAcrossLanesIntrinsic(AArch64ISD::SMINV, N, DAG); in performIntrinsicCombine()
9024 Opcode = AArch64ISD::SMINV; in tryMatchAcrossLaneShuffleForReduction()
10123 case AArch64ISD::SMINV: in ReplaceNodeResults()
10124 ReplaceReductionResults(N, Results, DAG, ISD::SMIN, AArch64ISD::SMINV); in ReplaceNodeResults()
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| D | AArch64InstrInfo.td | 294 def AArch64sminv : SDNode<"AArch64ISD::SMINV", SDT_AArch64UnaryVec>;
4127 defm SMINV : SIMDAcrossLanesBHS<0, 0b11010, "sminv">;
4263 defm : SIMDAcrossLanesSignedIntrinsic<"SMINV", AArch64sminv>;
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 3186 ### SMINV ### subsection
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