| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64AddressingModes.h | 46 SXTH, enumerator
65 case AArch64_AM::SXTH: return "sxth"; in getShiftExtendName()
132 case 5: return AArch64_AM::SXTH; in getExtendType()
159 case AArch64_AM::SXTH: return 5; break; in getExtendEncoding()
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| /external/vixl/test/aarch32/config/ |
| D | cond-rd-operand-rn-t32.json | 57 "Sxth", // SXTH{<c>}{<q>} {<Rd>}, <Rm> ; T1
58 // SXTH{<c>}{<q>} {<Rd>}, <Rm> {, ROR #<amount> } ; T2
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| D | cond-rd-operand-rn-ror-amount-a32.json | 34 "Sxth", // SXTH{<c>}{<q>} {<Rd>}, <Rm> {, ROR #<amount> } ; A1
|
| D | cond-rd-operand-rn-ror-amount-t32.json | 34 "Sxth", // SXTH{<c>}{<q>} {<Rd>}, <Rm> {, ROR #<amount> } ; T2
|
| D | cond-rd-operand-rn-a32.json | 48 "Sxth", // SXTH{<c>}{<q>} {<Rd>}, <Rm> {, ROR #<amount> } ; A1
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | bitfield-extract.ll | 84 ; SHR with multiple uses is fine as SXTH and SBFX are both aliases of SBFM.
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb1.txt | 503 # SXTB/SXTH
|
| D | thumb2.txt | 2193 # SXTH
2247 # SXTH
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | thumb1.txt | 494 # SXTB/SXTH
|
| D | thumb2.txt | 2042 # SXTH
2096 # SXTH
|
| /external/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 365 SXTH, enumerator
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-thumb-instructions.s | 587 @ SXTB/SXTH
|
| D | basic-thumb2-instructions.s | 2670 @ SXTH
2726 @ SXTH
|
| /external/llvm/test/MC/ARM/ |
| D | basic-thumb-instructions.s | 638 @ SXTB/SXTH
|
| /external/v8/src/arm64/ |
| D | constants-arm64.h | 344 SXTH = 5, enumerator
|
| /external/v8/src/compiler/arm64/ |
| D | code-generator-arm64.cc | 121 return Operand(InputRegister32(index), SXTH); in InputOperand2_32()
151 return Operand(InputRegister64(index), SXTH); in InputOperand2_64()
|
| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeARM_T2_32.c | 161 #define SXTH 0xb200 macro
713 return push_inst16(compiler, SXTH | RD3(dst) | RN3(arg2)); in emit_op_imm()
|
| D | sljitNativeARM_32.c | 122 #define SXTH 0xe6bf0070 macro
1033 return push_inst(compiler, (op == SLJIT_MOV_U16 ? UXTH : SXTH) | RD(dst) | RM(src2)); in emit_single_op()
|
| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 193 COMPARE_MACRO(Mov(w14, Operand(w15, SXTH, 2)), "sbfiz w14, w15, #2, #16"); in TEST()
432 COMPARE(adds(w21, w22, Operand(w23, SXTH, 2)), "adds w21, w22, w23, sxth #2"); in TEST()
436 COMPARE(cmn(x2, Operand(x3, SXTH, 4)), "cmn x2, w3, sxth #4"); in TEST()
458 COMPARE(subs(w21, w22, Operand(w23, SXTH, 2)), "subs w21, w22, w23, sxth #2"); in TEST()
2374 COMPARE_MACRO(Csel(x3, x4, Operand(x5, SXTH), eq), in TEST()
2379 Operand(x5, SXTH), in TEST()
2394 COMPARE_MACRO(Csel(x9, Operand(x10, SXTH), x11, eq), in TEST()
2398 Operand(x10, SXTH), in TEST()
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| D | test-assembler-aarch64.cc | 328 __ Mvn(x13, Operand(x2, SXTH, 3)); in TEST()
503 __ Mov(x26, Operand(x13, SXTH, 3)); in TEST()
557 __ Mov(w22, Operand(w11, SXTH, 1)); in TEST()
564 __ Mov(x28, Operand(x12, SXTH, 1)); in TEST()
640 __ Orr(x11, x0, Operand(x1, SXTH, 1)); in TEST()
734 __ Orn(x11, x0, Operand(x1, SXTH, 1)); in TEST()
801 __ And(x11, x0, Operand(x1, SXTH, 1)); in TEST()
939 __ Bic(x11, x0, Operand(x1, SXTH, 1)); in TEST()
1063 __ Eor(x11, x0, Operand(x1, SXTH, 1)); in TEST()
1130 __ Eon(x11, x0, Operand(x1, SXTH, 1)); in TEST()
[all …]
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 2643 /* 16 bit sext */ { { ARM::SXTH , 0, ARM_AM::no_shift, 0 }, in ARMEmitIntExt()
2883 { { ARM::SXTH, ARM::t2SXTH }, 0, 0, MVT::i16 },
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| D | ARMScheduleSwift.td | 157 (instregex "SXTB", "SXTH", "SXTB16", "UXTB", "UXTH", "UXTB16",
|
| /external/vixl/src/aarch64/ |
| D | constants-aarch64.h | 290 SXTH = 5, enumerator
|
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 989 ET == AArch64_AM::UXTH || ET == AArch64_AM::SXTH || in isExtend()
2394 .Case("sxth", AArch64_AM::SXTH) in tryParseOptionalShiftExtend()
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 2031 Opc = isThumb ? ARM::t2SXTH : ARM::SXTH; in SelectIntCast()
|