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Searched refs:S_028800_STENCIL_ENABLE (Results 1 – 7 of 7) sorted by relevance

/external/mesa3d/src/amd/vulkan/
Dradv_pipeline.c947 ds->db_depth_control |= S_028800_STENCIL_ENABLE(1) | S_028800_BACKFACE_ENABLE(1); in radv_pipeline_init_depth_stencil_state()
/external/mesa3d/src/gallium/drivers/r600/
Dr600d.h425 #define S_028800_STENCIL_ENABLE(x) (((unsigned)(x) & 0x1) << 0) macro
1718 #define S_028800_STENCIL_ENABLE(x) (((unsigned)(x) & 0x1) << 0) macro
Devergreend.h503 #define S_028800_STENCIL_ENABLE(x) (((unsigned)(x) & 0x1) << 0) macro
Dr600_state.c425 db_depth_control |= S_028800_STENCIL_ENABLE(1); in r600_create_dsa_state()
Devergreen_state.c425 db_depth_control |= S_028800_STENCIL_ENABLE(1); in evergreen_create_dsa_state()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state.c1021 db_depth_control |= S_028800_STENCIL_ENABLE(1); in si_create_dsa_state()
/external/mesa3d/src/amd/common/
Dsid.h6726 #define S_028800_STENCIL_ENABLE(x) (((unsigned)(x) & 0x1) << 0) macro