Searched refs:ScaleVT (Results 1 – 2 of 2) sorted by relevance
/external/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 2200 SDVTList ScaleVT = DAG.getVTList(MVT::f32, MVT::i1); in LowerFDIV32() local 2202 SDValue DenominatorScaled = DAG.getNode(AMDGPUISD::DIV_SCALE, SL, ScaleVT, RHS, RHS, LHS); in LowerFDIV32() 2203 SDValue NumeratorScaled = DAG.getNode(AMDGPUISD::DIV_SCALE, SL, ScaleVT, LHS, RHS, LHS); in LowerFDIV32() 2235 SDVTList ScaleVT = DAG.getVTList(MVT::f64, MVT::i1); in LowerFDIV64() local 2237 SDValue DivScale0 = DAG.getNode(AMDGPUISD::DIV_SCALE, SL, ScaleVT, Y, Y, X); in LowerFDIV64() 2249 SDValue DivScale1 = DAG.getNode(AMDGPUISD::DIV_SCALE, SL, ScaleVT, X, Y, X); in LowerFDIV64()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | DAGCombiner.cpp | 13583 EVT ScaleVT = SVT.bitsLT(InnerSVT) ? VT : InnerVT; in visitVECTOR_SHUFFLE() local 13584 EVT ScaleSVT = ScaleVT.getScalarType(); in visitVECTOR_SHUFFLE() 13586 if (TLI.isTypeLegal(ScaleVT) && in visitVECTOR_SHUFFLE() 13608 bool LegalMask = TLI.isShuffleMaskLegal(NewMask, ScaleVT); in visitVECTOR_SHUFFLE() 13612 LegalMask = TLI.isShuffleMaskLegal(NewMask, ScaleVT); in visitVECTOR_SHUFFLE() 13616 SV0 = DAG.getBitcast(ScaleVT, SV0); in visitVECTOR_SHUFFLE() 13617 SV1 = DAG.getBitcast(ScaleVT, SV1); in visitVECTOR_SHUFFLE() 13619 VT, DAG.getVectorShuffle(ScaleVT, SDLoc(N), SV0, SV1, NewMask)); in visitVECTOR_SHUFFLE()
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