Home
last modified time | relevance | path

Searched refs:ScaledReg (Results 1 – 6 of 6) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Transforms/Utils/
DAddrModeMatcher.cpp51 WriteAsOperand(OS, ScaledReg, /*PrintType=*/false); in print()
80 if (AddrMode.Scale != 0 && AddrMode.ScaledReg != ScaleReg) in MatchScaledValue()
88 TestAddrMode.ScaledReg = ScaleReg; in MatchScaledValue()
103 TestAddrMode.ScaledReg = AddLHS; in MatchScaledValue()
367 AddrMode.ScaledReg = Addr; in MatchAddr()
371 AddrMode.ScaledReg = 0; in MatchAddr()
523 Value *BaseReg = AMAfter.BaseReg, *ScaledReg = AMAfter.ScaledReg; in IsProfitableToFoldIntoAddressingMode() local
527 if (ValueAlreadyLiveAtInst(BaseReg, AMBefore.BaseReg, AMBefore.ScaledReg)) in IsProfitableToFoldIntoAddressingMode()
529 if (ValueAlreadyLiveAtInst(ScaledReg, AMBefore.BaseReg, AMBefore.ScaledReg)) in IsProfitableToFoldIntoAddressingMode()
530 ScaledReg = 0; in IsProfitableToFoldIntoAddressingMode()
[all …]
/external/swiftshader/third_party/LLVM/include/llvm/Transforms/Utils/
DAddrModeMatcher.h38 Value *ScaledReg; member
39 ExtAddrMode() : BaseReg(0), ScaledReg(0) {} in ExtAddrMode()
44 return (BaseReg == O.BaseReg) && (ScaledReg == O.ScaledReg) &&
/external/llvm/lib/Transforms/Scalar/
DLoopStrengthReduce.cpp272 const SCEV *ScaledReg; member
281 ScaledReg(nullptr), UnfoldedOffset(0) {} in Formula()
384 if (ScaledReg) in isCanonical()
402 ScaledReg = BaseRegs.back(); in canonicalize()
408 while (Try < BaseRegsSize && !isa<SCEVAddRecExpr>(ScaledReg)) in canonicalize()
409 std::swap(ScaledReg, BaseRegs[Try++]); in canonicalize()
420 BaseRegs.push_back(ScaledReg); in unscale()
421 ScaledReg = nullptr; in unscale()
428 return !!ScaledReg + BaseRegs.size(); in getNumRegs()
435 ScaledReg ? ScaledReg->getType() : in getType()
[all …]
/external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/
DLoopStrengthReduce.cpp225 const SCEV *ScaledReg; member
232 Formula() : ScaledReg(0), UnfoldedOffset(0) {} in Formula()
332 return !!ScaledReg + BaseRegs.size(); in getNumRegs()
339 ScaledReg ? ScaledReg->getType() : in getType()
353 return S == ScaledReg || in referencesReg()
361 if (ScaledReg) in hasRegsUsedByUsesOtherThan()
362 if (RegUses.isRegUsedByUsesOtherThan(ScaledReg, LUIdx)) in hasRegsUsedByUsesOtherThan()
396 if (ScaledReg) in print()
397 OS << *ScaledReg; in print()
810 if (const SCEV *ScaledReg = F.ScaledReg) { in RateFormula() local
[all …]
DCodeGenPrepare.cpp848 Value *V = AddrMode.ScaledReg; in OptimizeMemoryInst()
/external/llvm/lib/CodeGen/
DCodeGenPrepare.cpp2085 Value *ScaledReg; member
2086 ExtAddrMode() : BaseReg(nullptr), ScaledReg(nullptr) {} in ExtAddrMode()
2091 return (BaseReg == O.BaseReg) && (ScaledReg == O.ScaledReg) && in operator ==()
2129 ScaledReg->printAsOperand(OS, /*PrintType=*/false); in print()
2677 if (AddrMode.Scale != 0 && AddrMode.ScaledReg != ScaleReg) in matchScaledValue()
2685 TestAddrMode.ScaledReg = ScaleReg; in matchScaledValue()
2700 TestAddrMode.ScaledReg = AddLHS; in matchScaledValue()
3449 AddrMode.ScaledReg = Addr; in matchAddr()
3453 AddrMode.ScaledReg = nullptr; in matchAddr()
3603 Value *BaseReg = AMAfter.BaseReg, *ScaledReg = AMAfter.ScaledReg; in isProfitableToFoldIntoAddressingMode() local
[all …]