| /external/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 293 unsigned SrcSubReg) { in shareSameRegisterFile() argument
300 if (SrcSubReg && DefSubReg) { in shareSameRegisterFile()
301 return TRI.getCommonSuperRegClass(SrcRC, SrcSubReg, DefRC, DefSubReg, in shareSameRegisterFile()
307 if (!SrcSubReg) { in shareSameRegisterFile()
308 std::swap(DefSubReg, SrcSubReg); in shareSameRegisterFile()
313 if (SrcSubReg) in shareSameRegisterFile()
314 return TRI.getMatchingSuperRegClass(SrcRC, DefRC, SrcSubReg) != nullptr; in shareSameRegisterFile()
323 unsigned SrcSubReg) const { in shouldRewriteCopySrc()
325 return shareSameRegisterFile(*this, DefRC, DefSubReg, SrcRC, SrcSubReg); in shouldRewriteCopySrc()
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| D | PeepholeOptimizer.cpp | 239 void addSource(unsigned SrcReg, unsigned SrcSubReg) { in addSource() argument
240 RegSrcs.push_back(TargetInstrInfo::RegSubRegPair(SrcReg, SrcSubReg)); in addSource()
243 void setSource(int Idx, unsigned SrcReg, unsigned SrcSubReg) { in setSource() argument
245 RegSrcs[Idx] = TargetInstrInfo::RegSubRegPair(SrcReg, SrcSubReg); in setSource()
778 virtual bool getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg, in getNextRewritableSource() argument
792 SrcSubReg = MOSrc.getSubReg(); in getNextRewritableSource()
900 bool getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg, in getNextRewritableSource() argument
982 bool getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg, in getNextRewritableSource() argument
992 SrcSubReg = MOInsertedReg.getSubReg(); in getNextRewritableSource()
1030 bool getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg, in getNextRewritableSource() argument
[all …]
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| D | TailDuplicator.cpp | 312 unsigned SrcSubReg = MI->getOperand(SrcOpIdx).getSubReg(); in processPHI() local
314 LocalVRMap.insert(std::make_pair(DefReg, RegSubRegPair(SrcReg, SrcSubReg))); in processPHI()
319 Copies.push_back(std::make_pair(NewDef, RegSubRegPair(SrcReg, SrcSubReg))); in processPHI()
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| D | PHIElimination.cpp | 361 unsigned SrcSubReg = MPhi->getOperand(i*2+1).getSubReg(); in LowerPHINode() local
400 .addReg(SrcReg, 0, SrcSubReg); in LowerPHINode()
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| D | RegisterCoalescer.cpp | 2836 unsigned DstReg, DstSubReg, SrcReg, SrcSubReg; in applyTerminalRule() local
2837 isMoveInstr(*TRI, &Copy, SrcReg, DstReg, SrcSubReg, DstSubReg); in applyTerminalRule()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIFixSGPRCopies.cpp | 218 unsigned SrcSubReg = MI.getOperand(I).getSubReg(); in foldVGPRCopyIntoRegSequence() local
224 SrcRC = TRI->getSubRegClass(SrcRC, SrcSubReg); in foldVGPRCopyIntoRegSequence()
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| D | SIRegisterInfo.h | 138 unsigned SrcSubReg) const override;
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| D | SIRegisterInfo.cpp | 811 unsigned SrcSubReg) const { in shouldRewriteCopySrc()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | PHIElimination.cpp | 286 unsigned SrcSubReg = MPhi->getOperand(i*2+1).getSubReg(); in LowerAtomicPHINode() local
317 TII->get(TargetOpcode::COPY), IncomingReg).addReg(SrcReg, 0, SrcSubReg); in LowerAtomicPHINode()
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| D | StrongPHIElimination.cpp | 697 unsigned SrcSubReg = SrcMO.getSubReg(); in InsertCopiesForPHI() local
702 CopyReg).addReg(SrcReg, 0, SrcSubReg); in InsertCopiesForPHI()
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| D | RegAllocLinearScan.cpp | 1000 unsigned SrcSubReg = CopyMI->getOperand(1).getSubReg(); in assignRegOrStackSlotAtInterval() local
1007 if (SrcSubReg) in assignRegOrStackSlotAtInterval()
1008 Reg = tri_->getSubReg(Reg, SrcSubReg); in assignRegOrStackSlotAtInterval()
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 520 unsigned SrcSubReg) const;
|