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Searched refs:Subs (Results 1 – 25 of 33) sorted by relevance

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/external/llvm/lib/MC/
DMCRegisterInfo.cpp32 for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI) in getSubReg() local
34 return *Subs; in getSubReg()
43 for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI) in getSubRegIndex() local
44 if (*Subs == SubReg) in getSubRegIndex()
/external/eigen/Eigen/src/Core/
DBandMatrix.h30 Subs = internal::traits<Derived>::Subs, enumerator
41 DataRowsAtCompileTime = ((Supers!=Dynamic) && (Subs!=Dynamic))
42 ? 1 + Supers + Subs
93 … ReturnOpposite = (Options&SelfAdjoint) && (((Index)>0 && Supers==0) || ((Index)<0 && Subs==0)),
191 Subs = _Subs,
193 DataRowsAtCompileTime = ((Supers!=Dynamic) && (Subs!=Dynamic)) ? 1 + Supers + Subs : Dynamic
198 template<typename _Scalar, int Rows, int Cols, int Supers, int Subs, int Options>
199 class BandMatrix : public BandMatrixBase<BandMatrix<_Scalar,Rows,Cols,Supers,Subs,Options> >
207 … explicit inline BandMatrix(Index rows=Rows, Index cols=Cols, Index supers=Supers, Index subs=Subs)
233 internal::variable_if_dynamic<Index, Subs> m_subs;
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/external/llvm/lib/Support/
DCommandLine.cpp135 if (Opt.Subs.empty()) in addLiteralOption()
138 for (auto SC : Opt.Subs) in addLiteralOption()
186 if (O->Subs.empty()) { in addOption()
189 for (auto SC : O->Subs) in addOption()
224 if (O->Subs.empty()) in removeOption()
231 for (auto SC : O->Subs) in removeOption()
263 if (O->Subs.empty()) in updateArgStr()
266 for (auto SC : O->Subs) in updateArgStr()
1710 SmallVectorImpl<std::pair<const char *, SubCommand *>> &Subs) { in sortSubCommands() argument
1714 Subs.push_back(std::make_pair(S->getName(), S)); in sortSubCommands()
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/external/swiftshader/third_party/llvm-subzero/lib/Support/
DCommandLine.cpp149 if (Opt.Subs.empty()) in addLiteralOption()
152 for (auto SC : Opt.Subs) in addLiteralOption()
200 if (O->Subs.empty()) { in addOption()
203 for (auto SC : O->Subs) in addOption()
238 if (O->Subs.empty()) in removeOption()
245 for (auto SC : O->Subs) in removeOption()
277 if (O->Subs.empty()) in updateArgStr()
280 for (auto SC : O->Subs) in updateArgStr()
1735 SmallVectorImpl<std::pair<const char *, SubCommand *>> &Subs) { in sortSubCommands() argument
1739 Subs.push_back(std::make_pair(S->getName().data(), S)); in sortSubCommands()
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/external/vixl/examples/aarch32/
Dpi.cc70 __ Subs(r0, r0, 1); in GenerateApproximatePi() local
/external/llvm/include/llvm/Support/
DCommandLine.h254 SmallPtrSet<SubCommand *, 4> Subs; // The subcommands this option belongs to. variable
281 return std::any_of(Subs.begin(), Subs.end(), [](const SubCommand *SC) { in isInAllSubCommands()
299 void addSubCommand(SubCommand &S) { Subs.insert(&S); } in addSubCommand()
1655 Subs = AliasFor->Subs;
/external/swiftshader/third_party/llvm-subzero/include/llvm/Support/
DCommandLine.h260 SmallPtrSet<SubCommand *, 4> Subs; // The subcommands this option belongs to. variable
293 return any_of(Subs, [](const SubCommand *SC) { in isInAllSubCommands()
311 void addSubCommand(SubCommand &S) { Subs.insert(&S); } in addSubCommand()
1676 Subs = AliasFor->Subs;
/external/v8/src/arm64/
Dmacro-assembler-arm64-inl.h189 void MacroAssembler::Subs(const Register& rd, in Subs() function
210 Subs(AppropriateZeroRegFor(rn), rn, operand); in Cmp()
229 Subs(rd, AppropriateZeroRegFor(rd), operand); in Negs()
Dmacro-assembler-arm64.cc1044 __ Subs(temp, temp, 1); in PushMultipleTimes() local
1078 Subs(temp, count, 1); in PushMultipleTimes()
1083 Subs(temp, temp, 1); in PushMultipleTimes()
1091 Subs(temp, count, 4); in PushMultipleTimes()
1096 Subs(temp, temp, 4); in PushMultipleTimes()
2165 Subs(distance_in_words, end_address, current_address); in InitializeFieldsWithFiller()
Dcode-stubs-arm64.cc1647 __ Subs(number_of_capture_registers, number_of_capture_registers, 2); in Generate()
2428 __ Subs(length_delta, scratch1, scratch2); in GenerateCompareFlatOneByteStrings() local
2445 __ Subs(result, length_delta, 0); in GenerateCompareFlatOneByteStrings() local
/external/eigen/Eigen/src/Core/util/
DForwardDeclarations.h143 template<typename _Scalar, int Rows=Dynamic, int Cols=Dynamic, int Supers=Dynamic, int Subs=Dynamic…
/external/vixl/src/aarch64/
Dmacro-assembler-aarch64.cc1395 void MacroAssembler::Subs(const Register& rd, in Subs() function in vixl::aarch64::MacroAssembler
1410 Subs(AppropriateZeroRegFor(rn), rn, operand); in Cmp()
1514 Subs(rd, AppropriateZeroRegFor(rd), operand); in Negs()
/external/vixl/test/aarch32/
Dtest-simulator-cond-rd-rn-operand-rm-t32.cc137 M(Subs) \
Dtest-simulator-cond-rd-rn-operand-rm-a32.cc137 M(Subs) \
Dtest-disasm-a32.cc1529 COMPARE_A32(Subs(r0, r1, -1), "adds r0, r1, #1\n"); in TEST()
1532 COMPARE_T32(Subs(r0, r1, -1), "subs r0, r1, #4294967295\n"); in TEST()
1535 COMPARE_BOTH(Subs(r0, r1, -4), "adds r0, r1, #4\n"); in TEST()
Dtest-simulator-cond-rdlow-rnlow-operand-immediate-t32.cc123 M(Subs)
Dtest-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc137 M(Subs)
Dtest-simulator-cond-rd-rn-operand-const-a32.cc137 M(Subs)
Dtest-simulator-cond-rd-rn-operand-const-t32.cc137 M(Subs)
Dtest-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc137 M(Subs)
Dtest-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc137 M(Subs)
Dtest-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc137 M(Subs)
/external/v8/src/builtins/arm64/
Dbuiltins-arm64.cc146 __ Subs(x4, x4, 1); in Generate_MathMaxMin() local
2395 __ Subs(x0, x0, x2); in Generate_CallForwardVarargs() local
2410 __ Subs(x2, x2, 1); in Generate_CallForwardVarargs() local
/external/v8/src/full-codegen/arm64/
Dfull-codegen-arm64.cc176 __ Subs(x2, x2, 1); in Generate() local
347 __ Subs(x3, x3, Smi::FromInt(delta)); in EmitProfilingCounterDecrement() local
1557 __ Subs(x10, left, right); in EmitInlineSmiBinaryOp() local
/external/v8/src/compiler/arm64/
Dcode-generator-arm64.cc1104 __ Subs(i.OutputRegister(), i.InputOrZeroRegister64(0), in AssembleArchInstruction() local
1113 __ Subs(i.OutputRegister32(), i.InputOrZeroRegister32(0), in AssembleArchInstruction() local

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