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Searched refs:TGSI_OPCODE_ARR (Results 1 – 11 of 11) sorted by relevance

/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_info.c101 { 1, 1, 0, 0, 0, 0, 0, COMP, "ARR", TGSI_OPCODE_ARR },
383 case TGSI_OPCODE_ARR: in tgsi_opcode_infer_type()
498 case TGSI_OPCODE_ARR: in tgsi_opcode_infer_src_type()
Dtgsi_util.c185 case TGSI_OPCODE_ARR: in tgsi_util_get_inst_usage_mask()
Dtgsi_exec.c5391 case TGSI_OPCODE_ARR: in exec_instruction()
/external/mesa3d/src/gallium/include/pipe/
Dp_shader_tokens.h392 #define TGSI_OPCODE_ARR 61 macro
/external/mesa3d/src/gallium/drivers/r300/
Dr300_tgsi_to_rc.c84 case TGSI_OPCODE_ARR: return RC_OPCODE_ARR; in translate_opcode()
/external/mesa3d/src/gallium/drivers/ilo/shader/
Dtoy_tgsi.c64 [TGSI_OPCODE_ARR] = { GEN6_OPCODE_RNDZ, 1, 1 },
807 [TGSI_OPCODE_ARR] = aos_simple,
1348 [TGSI_OPCODE_ARR] = soa_per_channel,
/external/mesa3d/src/gallium/auxiliary/nir/
Dtgsi_to_nir.c1570 [TGSI_OPCODE_ARR] = 0,
1808 case TGSI_OPCODE_ARR: in ttn_emit_instruction()
/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_tgsi_aos.c755 case TGSI_OPCODE_ARR: in lp_emit_instruction_aos()
Dlp_bld_tgsi_action.c1332 bld_base->op_actions[TGSI_OPCODE_ARR].emit = arr_emit; in lp_set_default_actions()
2555 bld_base->op_actions[TGSI_OPCODE_ARR].emit = arr_emit_cpu; in lp_set_default_actions_cpu()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_shader.c8321 case TGSI_OPCODE_ARR: in tgsi_eg_arl()
8389 case TGSI_OPCODE_ARR: in tgsi_r600_arl()
9122 [TGSI_OPCODE_ARR] = { ALU_OP0_NOP, tgsi_r600_arl},
9320 [TGSI_OPCODE_ARR] = { ALU_OP0_NOP, tgsi_eg_arl},
9543 [TGSI_OPCODE_ARR] = { ALU_OP0_NOP, tgsi_eg_arl},
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_from_tgsi.cpp3074 case TGSI_OPCODE_ARR: in handleInstruction()
3077 tgsi.getOpcode() == TGSI_OPCODE_ARR ? ROUND_N : ROUND_M; in handleInstruction()