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Searched refs:TGSI_OPCODE_ISHR (Results 1 – 14 of 14) sorted by relevance

/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_info.c165 { 1, 2, 0, 0, 0, 0, 0, COMP, "ISHR", TGSI_OPCODE_ISHR },
395 case TGSI_OPCODE_ISHR: in tgsi_opcode_infer_type()
Dtgsi_util.c229 case TGSI_OPCODE_ISHR: in tgsi_util_get_inst_usage_mask()
Dtgsi_exec.c5789 case TGSI_OPCODE_ISHR: in exec_instruction()
/external/mesa3d/src/gallium/include/pipe/
Dp_shader_tokens.h460 #define TGSI_OPCODE_ISHR 125 macro
/external/mesa3d/src/gallium/drivers/ilo/shader/
Dtoy_tgsi.c88 [TGSI_OPCODE_ISHR] = { GEN6_OPCODE_ASR, 1, 2 },
859 [TGSI_OPCODE_ISHR] = aos_simple,
1400 [TGSI_OPCODE_ISHR] = soa_per_channel,
/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_tgsi_aos.c870 case TGSI_OPCODE_ISHR: in lp_emit_instruction_aos()
Dlp_bld_tgsi_action.c2575 bld_base->op_actions[TGSI_OPCODE_ISHR].emit = ishr_emit_cpu; in lp_set_default_actions_cpu()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_shader_tgsi_alu.c822 bld_base->op_actions[TGSI_OPCODE_ISHR].emit = emit_ishr; in si_shader_context_init_alu()
/external/mesa3d/src/gallium/auxiliary/nir/
Dtgsi_to_nir.c1640 [TGSI_OPCODE_ISHR] = nir_op_ishr,
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_from_tgsi.cpp597 case TGSI_OPCODE_ISHR: in inferSrcType()
3028 case TGSI_OPCODE_ISHR: in handleInstruction()
/external/mesa3d/src/gallium/drivers/svga/
Dsvga_tgsi_vgpu10.c599 case TGSI_OPCODE_ISHR: in translate_opcode()
5679 case TGSI_OPCODE_ISHR: in emit_vgpu10_instruction()
Dsvga_tgsi_insn.c3009 case TGSI_OPCODE_ISHR: in svga_emit_instruction()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_shader.c9186 [TGSI_OPCODE_ISHR] = { ALU_OP2_ASHR_INT, tgsi_op2_trans},
9384 [TGSI_OPCODE_ISHR] = { ALU_OP2_ASHR_INT, tgsi_op2},
9607 [TGSI_OPCODE_ISHR] = { ALU_OP2_ASHR_INT, tgsi_op2},
/external/mesa3d/src/mesa/state_tracker/
Dst_glsl_to_tgsi.cpp2060 emit_asm(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]); in visit_expression()