/external/mesa3d/src/gallium/auxiliary/tgsi/ |
D | tgsi_util.c | 280 read_mask = TGSI_WRITEMASK_XYZW; in tgsi_util_get_inst_usage_mask() 284 read_mask = src_idx == 0 ? TGSI_WRITEMASK_XYZ : TGSI_WRITEMASK_XYZW; in tgsi_util_get_inst_usage_mask() 320 read_mask = TGSI_WRITEMASK_XYZW; in tgsi_util_get_inst_usage_mask() 332 read_mask = TGSI_WRITEMASK_XYZW; in tgsi_util_get_inst_usage_mask() 338 read_mask = TGSI_WRITEMASK_XYZW; in tgsi_util_get_inst_usage_mask()
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D | tgsi_lowering.c | 411 if (dst->Register.WriteMask & TGSI_WRITEMASK_XYZW) { in transform_lrp() 416 reg_dst(&new_inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_XYZW); in transform_lrp() 428 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_XYZW); in transform_lrp() 459 if (dst->Register.WriteMask & TGSI_WRITEMASK_XYZW) { in transform_frc() 464 reg_dst(&new_inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_XYZW); in transform_frc() 473 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_XYZW); in transform_frc() 505 if (dst->Register.WriteMask & TGSI_WRITEMASK_XYZW) { in transform_pow() 529 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_XYZW); in transform_pow() 960 if (dst->Register.WriteMask & TGSI_WRITEMASK_XYZW) { in transform_dotp() 1034 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_XYZW); in transform_dotp() [all …]
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D | tgsi_point_sprite.c | 256 ts->point_size_tmp, TGSI_WRITEMASK_XYZW); in psprite_prolog() 285 TGSI_WRITEMASK_XYZW, in psprite_emit_vertex_inst() 347 TGSI_WRITEMASK_XYZW, in psprite_emit_vertex_inst() 357 TGSI_WRITEMASK_XYZW); in psprite_emit_vertex_inst() 383 dstReg, TGSI_WRITEMASK_XYZW); in psprite_emit_vertex_inst()
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D | tgsi_ureg.c | 288 assert(usage_mask <= TGSI_WRITEMASK_XYZW); in ureg_DECL_fs_input_cyl_centroid_layout() 338 ureg->nr_input_regs, TGSI_WRITEMASK_XYZW, array_id, array_size); in ureg_DECL_fs_input_cyl_centroid() 479 return ureg_DECL_output_masked(ureg, name, index, TGSI_WRITEMASK_XYZW, in ureg_DECL_output() 491 TGSI_WRITEMASK_XYZW, in ureg_DECL_output_array() 1656 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_temps() 1681 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_range() 1702 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_range2D() 1728 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_sampler_view() 1756 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_image() 1780 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_buffer() [all …]
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D | tgsi_emulate.c | 90 new_inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in passthrough_edgeflag()
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D | tgsi_build.c | 106 declaration.UsageMask = TGSI_WRITEMASK_XYZW; in tgsi_default_declaration() 1012 dst_register.WriteMask = TGSI_WRITEMASK_XYZW; in tgsi_default_dst_register() 1034 assert( mask <= TGSI_WRITEMASK_XYZW ); in tgsi_build_dst_register()
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D | tgsi_ureg.h | 1275 dst.WriteMask = TGSI_WRITEMASK_XYZW; in ureg_dst_array_register() 1316 dst.WriteMask = TGSI_WRITEMASK_XYZW; in ureg_dst()
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D | tgsi_transform.h | 195 decl.Declaration.UsageMask = TGSI_WRITEMASK_XYZW; in tgsi_transform_sampler_view_decl()
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D | tgsi_scan.c | 880 dst->Register.WriteMask != TGSI_WRITEMASK_XYZW) in tgsi_is_passthrough_shader()
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D | tgsi_dump.c | 223 if (writemask != TGSI_WRITEMASK_XYZW) { in _dump_writemask()
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/external/mesa3d/src/mesa/state_tracker/ |
D | st_atifs_to_tgsi.c | 722 inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_instr() 738 inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_instr() 749 inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_instr() 764 inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_instr() 775 inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_instr() 786 inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_instr() 798 inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_instr() 811 inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_instr()
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D | st_cb_drawpixels_shader.c | 152 TGSI_WRITEMASK_XYZW, in transform_instr()
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D | st_tgsi_lower_yuv.c | 240 ctx->tmp[i].dst.Register.WriteMask = TGSI_WRITEMASK_XYZW; in emit_decls()
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D | st_mesa_to_tgsi.c | 351 (negate_mask == 0 || negate_mask == TGSI_WRITEMASK_XYZW)) in emit_swz()
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/external/mesa3d/src/gallium/auxiliary/gallivm/ |
D | lp_bld_tgsi_info.c | 142 readmask = TGSI_WRITEMASK_XYZW; in analyse_tex() 149 readmask = TGSI_WRITEMASK_XYZW; in analyse_tex() 235 readmask = TGSI_WRITEMASK_XYZW; in analyse_sample()
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D | lp_bld_tgsi_aos.c | 312 if (reg->Register.WriteMask != TGSI_WRITEMASK_XYZW) { in lp_emit_store_aos()
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/external/mesa3d/src/gallium/drivers/r300/ |
D | r300_vs_draw.c | 253 new_inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_inst() 265 new_inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_inst()
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/external/mesa3d/src/gallium/auxiliary/util/ |
D | u_blit.c | 68 void *fs[PIPE_MAX_TEXTURE_TYPES][TGSI_WRITEMASK_XYZW + 1][3]; 596 set_fragment_shader(ctx, TGSI_WRITEMASK_XYZW, in util_blit_pixels_tex()
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D | u_simple_shaders.c | 257 if (writemask != TGSI_WRITEMASK_XYZW) { in util_make_fragment_tex_shader_writemask() 307 TGSI_WRITEMASK_XYZW, in util_make_fragment_tex_shader()
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D | u_pstipple.c | 345 TGSI_WRITEMASK_XYZW, in pstip_transform_prolog()
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/external/mesa3d/src/gallium/include/pipe/ |
D | p_shader_tokens.h | 97 #define TGSI_WRITEMASK_XYZW 0x0F macro
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/external/mesa3d/src/gallium/state_trackers/nine/ |
D | nine_ff.c | 668 tmp.WriteMask = TGSI_WRITEMASK_XYZW; in nine_ff_build_vs() 694 tmp.WriteMask = TGSI_WRITEMASK_XYZW; in nine_ff_build_vs() 707 writemask = TGSI_WRITEMASK_XYZW; in nine_ff_build_vs() 1478 dst.WriteMask = TGSI_WRITEMASK_XYZW; in nine_ff_build_ps() 1485 if (dst.WriteMask != TGSI_WRITEMASK_XYZW) { in nine_ff_build_ps()
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/external/mesa3d/src/gallium/drivers/i915/ |
D | i915_fpc_optimize.c | 587 current->FullInstruction.Dst[0].Register.WriteMask == TGSI_WRITEMASK_XYZW && in i915_fpc_optimize_useless_mov_after_inst()
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/external/mesa3d/src/gallium/drivers/llvmpipe/ |
D | lp_bld_interp.c | 736 bld->mask[0] = TGSI_WRITEMASK_XYZW; in lp_build_interp_soa_init()
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/external/mesa3d/src/gallium/drivers/nouveau/nv50/ |
D | nv50_surface.c | 938 TGSI_WRITEMASK_XYZW : TGSI_WRITEMASK_X; in nv50_blitter_make_fp() 988 unsigned mask = TGSI_WRITEMASK_XYZW; in nv50_blitter_make_fp()
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