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Searched refs:TSR (Results 1 – 7 of 7) sorted by relevance

/external/llvm/lib/Target/PowerPC/
DPPCInstrHTM.td63 def TSR : XForm_htm2 <31, 750,
131 (TSR (HTM_get_imm imm:$L))>;
164 (TSR 1)>;
167 (TSR 0)>;
/external/llvm/lib/Target/Hexagon/
DHexagonEarlyIfConv.cpp781 unsigned TR = 0, TSR = 0, FR = 0, FSR = 0, SR = 0, SSR = 0; in updatePhiNodes() local
787 TR = RO.getReg(), TSR = RO.getSubReg(); in updatePhiNodes()
796 TR = SR, TSR = SSR; in updatePhiNodes()
814 .addReg(TR, 0, TSR) in updatePhiNodes()
/external/syslinux/gpxe/src/drivers/net/
Dmtd80x.c117 TSR = 0x48, /* tally counter for transmit status */ enumerator
Dvia-velocity.h226 u16 TSR; /* Transmit status register */ member
/external/v8/src/ppc/
Dconstants-ppc.h1631 V(tsr, TSR, 0x7C0005DC) \
/external/libtextclassifier/models/
Dtextclassifier.langid.model352 …t���h���`0Be����56&d?�� ���}�V�Я,�.V�t��uP�ʇ��qyI[V�}��u=�����̜�,%SZء�TSR���N;ͺ�{hc�������…
/external/libtextclassifier/tests/testdata/
Dlangid.model352 …t���h���`0Be����56&d?�� ���}�V�Я,�.V�t��uP�ʇ��qyI[V�}��u=�����̜�,%SZء�TSR���N;ͺ�{hc�������…