/external/llvm/lib/CodeGen/ |
D | TargetRegisterInfo.cpp | 30 TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterInfoDesc *ID, in TargetRegisterInfo() function in TargetRegisterInfo 41 TargetRegisterInfo::~TargetRegisterInfo() {} in ~TargetRegisterInfo() 45 Printable PrintReg(unsigned Reg, const TargetRegisterInfo *TRI, in PrintReg() 50 else if (TargetRegisterInfo::isStackSlot(Reg)) in PrintReg() 51 OS << "SS#" << TargetRegisterInfo::stackSlot2Index(Reg); in PrintReg() 52 else if (TargetRegisterInfo::isVirtualRegister(Reg)) in PrintReg() 53 OS << "%vreg" << TargetRegisterInfo::virtReg2Index(Reg); in PrintReg() 67 Printable PrintRegUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in PrintRegUnit() 90 Printable PrintVRegOrUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in PrintVRegOrUnit() 93 OS << "%vreg" << TargetRegisterInfo::virtReg2Index(Unit); in PrintVRegOrUnit() [all …]
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D | DetectDeadLanes.cpp | 112 const TargetRegisterInfo *TRI; 167 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); in isCrossCopy() 201 if (!TargetRegisterInfo::isVirtualRegister(MOReg)) in addUsedLanesOnOperand() 209 unsigned MORegIdx = TargetRegisterInfo::virtReg2Index(MOReg); in addUsedLanesOnOperand() 225 if (!MO.isReg() || !TargetRegisterInfo::isVirtualRegister(MO.getReg())) in transferUsedLanesStep() 237 TargetRegisterInfo::virtReg2Index(MI.getOperand(0).getReg())]); in transferUsedLanes() 292 if (!TargetRegisterInfo::isVirtualRegister(DefReg)) in transferDefinedLanesStep() 294 unsigned DefRegIdx = TargetRegisterInfo::virtReg2Index(DefReg); in transferDefinedLanesStep() 366 unsigned RegIdx = TargetRegisterInfo::virtReg2Index(Reg); in determineInitialDefinedLanes() 388 if (TargetRegisterInfo::isPhysicalRegister(MOReg)) { in determineInitialDefinedLanes() [all …]
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D | RegisterCoalescer.h | 21 class TargetRegisterInfo; variable 29 const TargetRegisterInfo &TRI; 60 CoalescerPair(const TargetRegisterInfo &tri) in CoalescerPair() 67 const TargetRegisterInfo &tri) in CoalescerPair()
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D | RegAllocFast.cpp | 57 const TargetRegisterInfo *TRI; 80 return TargetRegisterInfo::virtReg2Index(VirtReg); in getSparseSetIndex() 185 return LiveVirtRegs.find(TargetRegisterInfo::virtReg2Index(VirtReg)); in findLiveVirtReg() 188 return LiveVirtRegs.find(TargetRegisterInfo::virtReg2Index(VirtReg)); in findLiveVirtReg() 261 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in killVirtReg() 271 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in spillVirtReg() 350 assert(TargetRegisterInfo::isPhysicalRegister(PhysReg) && in usePhysReg() 529 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in allocVirtReg() 535 if (Hint && (!TargetRegisterInfo::isPhysicalRegister(Hint) || in allocVirtReg() 602 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in defineVirtReg() [all …]
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D | InterferenceCache.h | 25 const TargetRegisterInfo *TRI; 113 void revalidate(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI); 116 bool valid(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI); 121 const TargetRegisterInfo *TRI, 164 const TargetRegisterInfo *);
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D | VirtRegMap.cpp | 86 if (TargetRegisterInfo::isVirtualRegister(Hint)) in hasPreferredPhys() 93 if (TargetRegisterInfo::isPhysicalRegister(Hint.second)) in hasKnownPreference() 95 if (TargetRegisterInfo::isVirtualRegister(Hint.second)) in hasKnownPreference() 101 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirt2StackSlot() 109 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirt2StackSlot() 121 unsigned Reg = TargetRegisterInfo::index2VirtReg(i); in print() 130 unsigned Reg = TargetRegisterInfo::index2VirtReg(i); in print() 158 const TargetRegisterInfo *TRI; 291 unsigned VirtReg = TargetRegisterInfo::index2VirtReg(Idx); in addMBBLiveIns() 396 if (!MO.isReg() || !TargetRegisterInfo::isVirtualRegister(MO.getReg())) in rewrite()
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D | MachineRegisterInfo.cpp | 101 unsigned Reg = TargetRegisterInfo::index2VirtReg(getNumVirtRegs()); in createVirtualRegister() 125 unsigned Reg = TargetRegisterInfo::index2VirtReg(getNumVirtRegs()); in createGenericVirtualRegister() 140 unsigned Reg = TargetRegisterInfo::index2VirtReg(i); in clearVirtRegs() 193 verifyUseList(TargetRegisterInfo::index2VirtReg(i)); in verifyUseLists() 318 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in replaceRegWith() 324 if (TargetRegisterInfo::isPhysicalRegister(ToReg)) { in replaceRegWith() 399 const TargetRegisterInfo &TRI, in EmitLiveInCopies() 429 assert(TargetRegisterInfo::isVirtualRegister(Reg)); in getMaxLaneMaskForVReg() 449 assert(TargetRegisterInfo::isPhysicalRegister(PhysReg)); in isConstantPhysReg() 508 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isPhysRegModified() [all …]
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D | MachineInstr.cpp | 78 const TargetRegisterInfo &TRI) { in substVirtReg() 79 assert(TargetRegisterInfo::isVirtualRegister(Reg)); in substVirtReg() 87 void MachineOperand::substPhysReg(unsigned Reg, const TargetRegisterInfo &TRI) { in substPhysReg() 88 assert(TargetRegisterInfo::isPhysicalRegister(Reg)); in substPhysReg() 308 const TargetRegisterInfo *TRI) const { in print() 314 const TargetRegisterInfo *TRI) const { in print() 1008 if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()) || in isIdenticalTo() 1009 TargetRegisterInfo::isPhysicalRegister(OMO.getReg())) in isIdenticalTo() 1061 if (!TargetRegisterInfo::isVirtualRegister(Reg)) in eraseFromParentAndMarkDBGValuesForRemoval() 1180 const TargetRegisterInfo *TRI) const { in getRegClassConstraint() [all …]
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D | CalcSpillWeights.cpp | 38 unsigned Reg = TargetRegisterInfo::index2VirtReg(i); in calculateSpillWeightsAndHints() 47 const TargetRegisterInfo &tri, in copyHint() 63 if (TargetRegisterInfo::isVirtualRegister(hreg)) in copyHint() 108 if (!TargetRegisterInfo::isVirtualRegister(Reg) || in isRematerializable() 133 const TargetRegisterInfo &tri = *MF.getSubtarget().getRegisterInfo(); in calculateSpillWeightAndHint() 193 if (TargetRegisterInfo::isPhysicalRegister(hint)) { in calculateSpillWeightAndHint()
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/external/swiftshader/third_party/LLVM/lib/Target/ |
D | TargetRegisterInfo.cpp | 23 TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterInfoDesc *ID, in TargetRegisterInfo() function in TargetRegisterInfo 30 TargetRegisterInfo::~TargetRegisterInfo() {} in ~TargetRegisterInfo() 35 else if (TargetRegisterInfo::isStackSlot(Reg)) in print() 36 OS << "SS#" << TargetRegisterInfo::stackSlot2Index(Reg); in print() 37 else if (TargetRegisterInfo::isVirtualRegister(Reg)) in print() 38 OS << "%vreg" << TargetRegisterInfo::virtReg2Index(Reg); in print() 55 TargetRegisterInfo::getMinimalPhysRegClass(unsigned reg, EVT VT) const { in getMinimalPhysRegClass() 81 BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF, in getAllocatableSet() 87 for (TargetRegisterInfo::regclass_iterator I = regclass_begin(), in getAllocatableSet() 101 TargetRegisterInfo::getCommonSubClass(const TargetRegisterClass *A, in getCommonSubClass()
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/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyMachineFunctionInfo.h | 63 if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size()) in stackifyVReg() 64 VRegStackified.resize(TargetRegisterInfo::virtReg2Index(VReg) + 1); in stackifyVReg() 65 VRegStackified.set(TargetRegisterInfo::virtReg2Index(VReg)); in stackifyVReg() 68 if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size()) in isVRegStackified() 70 return VRegStackified.test(TargetRegisterInfo::virtReg2Index(VReg)); in isVRegStackified() 76 assert(TargetRegisterInfo::virtReg2Index(VReg) < WARegs.size()); in setWAReg() 77 WARegs[TargetRegisterInfo::virtReg2Index(VReg)] = WAReg; in setWAReg() 80 assert(TargetRegisterInfo::virtReg2Index(Reg) < WARegs.size()); in getWAReg() 81 return WARegs[TargetRegisterInfo::virtReg2Index(Reg)]; in getWAReg()
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | MachineInstr.h | 36 class TargetRegisterInfo; variable 308 bool readsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const { 329 bool killsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const { 337 bool definesRegister(unsigned Reg, const TargetRegisterInfo *TRI=NULL) const { 344 bool modifiesRegister(unsigned Reg, const TargetRegisterInfo *TRI) const { 352 const TargetRegisterInfo *TRI = NULL) const { 360 const TargetRegisterInfo *TRI = NULL) const; 365 const TargetRegisterInfo *TRI = NULL) { 377 const TargetRegisterInfo *TRI = NULL) const; 382 const TargetRegisterInfo *TRI = NULL) { [all …]
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/external/llvm/lib/CodeGen/AsmPrinter/ |
D | DwarfExpression.h | 24 class TargetRegisterInfo; variable 48 virtual bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg) = 0; 77 bool AddMachineRegIndirect(const TargetRegisterInfo &TRI, unsigned MachineReg, 94 bool AddMachineRegPiece(const TargetRegisterInfo &TRI, unsigned MachineReg, 110 bool AddMachineRegExpression(const TargetRegisterInfo &TRI, 132 bool isFrameRegister(const TargetRegisterInfo &TRI, 147 bool isFrameRegister(const TargetRegisterInfo &TRI,
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/external/llvm/include/llvm/CodeGen/ |
D | VirtRegMap.h | 43 const TargetRegisterInfo *TRI; 86 const TargetRegisterInfo &getTargetRegInfo() const { return *TRI; } in getTargetRegInfo() 99 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in getPhys() 106 assert(TargetRegisterInfo::isVirtualRegister(virtReg) && in assignVirt2Phys() 107 TargetRegisterInfo::isPhysicalRegister(physReg)); in assignVirt2Phys() 117 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in clearVirt() 169 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in getStackSlot()
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D | MachineInstr.h | 41 class TargetRegisterInfo; variable 876 const TargetRegisterInfo *TRI = nullptr) const { 897 const TargetRegisterInfo *TRI = nullptr) const { 906 const TargetRegisterInfo *TRI = nullptr) const { 913 bool modifiesRegister(unsigned Reg, const TargetRegisterInfo *TRI) const { 921 const TargetRegisterInfo *TRI = nullptr) const { 933 const TargetRegisterInfo *TRI = nullptr) const; 938 const TargetRegisterInfo *TRI = nullptr) { 945 const TargetRegisterInfo *TRI = nullptr) const { 958 const TargetRegisterInfo *TRI = nullptr) const; [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | Thumb1InstrInfo.cpp | 49 const TargetRegisterInfo *TRI) const { in storeRegToStackSlot() 51 (TargetRegisterInfo::isPhysicalRegister(SrcReg) && in storeRegToStackSlot() 55 (TargetRegisterInfo::isPhysicalRegister(SrcReg) && in storeRegToStackSlot() 78 const TargetRegisterInfo *TRI) const { in loadRegFromStackSlot() 80 (TargetRegisterInfo::isPhysicalRegister(DestReg) && in loadRegFromStackSlot() 84 (TargetRegisterInfo::isPhysicalRegister(DestReg) && in loadRegFromStackSlot()
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/external/llvm/include/llvm/CodeGen/GlobalISel/ |
D | RegisterBank.h | 24 class TargetRegisterInfo; variable 68 bool verify(const TargetRegisterInfo &TRI) const; 84 void dump(const TargetRegisterInfo *TRI = nullptr) const; 92 const TargetRegisterInfo *TRI = nullptr) const;
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | VirtRegMap.cpp | 82 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in runOnMachineFunction() 121 if (TargetRegisterInfo::isVirtualRegister(physReg) && hasPhys(physReg)) in getRegAllocPref() 124 return (TargetRegisterInfo::isPhysicalRegister(physReg)) in getRegAllocPref() 130 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirt2StackSlot() 138 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirt2StackSlot() 148 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirtReMatId() 156 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirtReMatId() 233 unsigned Reg = TargetRegisterInfo::index2VirtReg(i); in FindUnusedRegisters() 279 if (!MO.isReg() || !TargetRegisterInfo::isVirtualRegister(MO.getReg())) in rewrite() 356 const TargetRegisterInfo* TRI = MF->getTarget().getRegisterInfo(); in print() [all …]
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D | VirtRegMap.h | 36 class TargetRegisterInfo; variable 55 const TargetRegisterInfo *TRI; 165 const TargetRegisterInfo &getTargetRegInfo() const { return *TRI; } in getTargetRegInfo() 178 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in getPhys() 185 assert(TargetRegisterInfo::isVirtualRegister(virtReg) && in assignVirt2Phys() 186 TargetRegisterInfo::isPhysicalRegister(physReg)); in assignVirt2Phys() 196 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in clearVirt() 249 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in getStackSlot() 256 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in getReMatId() 450 ImplicitDefed.set(TargetRegisterInfo::virtReg2Index(VirtReg)); in setIsImplicitlyDefined() [all …]
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D | DeadMachineInstructionElim.cpp | 32 const TargetRegisterInfo *TRI; 73 if (TargetRegisterInfo::isPhysicalRegister(Reg) ? in isDead() 109 if (TargetRegisterInfo::isPhysicalRegister(Reg)) in runOnMachineFunction() 139 if (!TargetRegisterInfo::isVirtualRegister(Reg)) in runOnMachineFunction() 167 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { in runOnMachineFunction() 184 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { in runOnMachineFunction()
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D | MachineRegisterInfo.cpp | 20 MachineRegisterInfo::MachineRegisterInfo(const TargetRegisterInfo &TRI) in MachineRegisterInfo() 34 assert(VRegInfo[TargetRegisterInfo::index2VirtReg(i)].second == 0 && in ~MachineRegisterInfo() 103 unsigned Reg = TargetRegisterInfo::index2VirtReg(getNumVirtRegs()); in createVirtualRegister() 106 const unsigned FirstVirtReg = TargetRegisterInfo::index2VirtReg(0); in createVirtualRegister() 125 unsigned Reg = TargetRegisterInfo::index2VirtReg(i); in HandleVRegListReallocation() 217 const TargetRegisterInfo &TRI, in EmitLiveInCopies() 245 void MachineRegisterInfo::closePhysRegsUsed(const TargetRegisterInfo &TRI) { in closePhysRegsUsed()
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D | RegisterCoalescer.h | 21 class TargetRegisterInfo; variable 30 const TargetRegisterInfo &TRI; 59 CoalescerPair(const TargetInstrInfo &tii, const TargetRegisterInfo &tri) in CoalescerPair()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonRDF.cpp | 23 if (TargetRegisterInfo::isVirtualRegister(RA.Reg) && in covers() 24 TargetRegisterInfo::isVirtualRegister(RB.Reg)) { in covers() 42 if (!TargetRegisterInfo::isPhysicalRegister(RR.Reg)) { in covers() 43 assert(TargetRegisterInfo::isVirtualRegister(RR.Reg)); in covers()
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/external/llvm/lib/Target/ARM/ |
D | Thumb1InstrInfo.cpp | 74 const TargetRegisterInfo *TRI) const { in storeRegToStackSlot() 76 (TargetRegisterInfo::isPhysicalRegister(SrcReg) && in storeRegToStackSlot() 80 (TargetRegisterInfo::isPhysicalRegister(SrcReg) && in storeRegToStackSlot() 100 const TargetRegisterInfo *TRI) const { in loadRegFromStackSlot() 102 (TargetRegisterInfo::isPhysicalRegister(DestReg) && in loadRegFromStackSlot() 106 (TargetRegisterInfo::isPhysicalRegister(DestReg) && in loadRegFromStackSlot()
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D | MLxExpansionPass.cpp | 52 const TargetRegisterInfo *TRI; 91 if (TargetRegisterInfo::isPhysicalRegister(Reg)) in getAccDefMI() 101 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in getAccDefMI() 107 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in getAccDefMI() 119 if (TargetRegisterInfo::isPhysicalRegister(Reg) || in getDefReg() 130 if (TargetRegisterInfo::isPhysicalRegister(Reg) || in getDefReg() 145 if (TargetRegisterInfo::isPhysicalRegister(Reg)) in hasLoopHazard() 159 if (TargetRegisterInfo::isVirtualRegister(SrcReg)) { in hasLoopHazard() 167 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in hasLoopHazard() 173 if (TargetRegisterInfo::isVirtualRegister(Reg)) { in hasLoopHazard()
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