Searched refs:Teq (Results 1 – 13 of 13) sorted by relevance
| /external/vixl/test/aarch32/ |
| D | test-simulator-cond-rd-operand-const-a32.cc | 124 M(Teq) \
|
| D | test-simulator-cond-rd-operand-const-t32.cc | 124 M(Teq) \
|
| D | test-simulator-cond-rd-operand-rn-a32.cc | 124 M(Teq) \
|
| D | test-simulator-cond-rd-operand-rn-t32.cc | 124 M(Teq) \
|
| D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-a32.cc | 124 M(Teq) \
|
| D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-t32.cc | 124 M(Teq) \
|
| D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc | 124 M(Teq) \
|
| D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-a32.cc | 124 M(Teq) \
|
| D | test-disasm-a32.cc | 1611 COMPARE_BOTH(Teq(r0, 0xbad), in TEST()
1614 COMPARE_BOTH(Teq(r0, 0xbadbeef), in TEST()
1618 MUST_FAIL_TEST_T32(Teq(r0, Operand(r1, LSL, r2)), in TEST()
|
| D | test-simulator-cond-rd-operand-rn-shift-rs-a32.cc | 124 M(Teq) \
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstMIPS32.h | 280 Teq, enumerator
1282 using InstMIPS32Teq = InstMIPS32Trap<InstMIPS32::Teq>;
|
| /external/libxml2/macos/ |
| D | libxml2.mcp.xml.sit.hqx | 118 Teq#1"dB$',jhRET3j*&b'*XN0pNbXSTG[`CEJjiH!3U5(Sp21C0*SEJrF3l2KZP
|
| /external/vixl/src/aarch32/ |
| D | macro-assembler-aarch32.h | 4811 void Teq(Condition cond, Register rn, const Operand& operand) { in Teq() function
4820 void Teq(Register rn, const Operand& operand) { Teq(al, rn, operand); } in Teq() function
|