| /external/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 429 { ISD::UREM, MVT::v1i64, 1 * FunctionCallDivCost}, in getArithmeticInstrCost()
433 { ISD::UREM, MVT::v2i32, 2 * FunctionCallDivCost}, in getArithmeticInstrCost()
437 { ISD::UREM, MVT::v4i16, 4 * FunctionCallDivCost}, in getArithmeticInstrCost()
441 { ISD::UREM, MVT::v8i8, 8 * FunctionCallDivCost}, in getArithmeticInstrCost()
446 { ISD::UREM, MVT::v2i64, 2 * FunctionCallDivCost}, in getArithmeticInstrCost()
450 { ISD::UREM, MVT::v4i32, 4 * FunctionCallDivCost}, in getArithmeticInstrCost()
454 { ISD::UREM, MVT::v8i16, 8 * FunctionCallDivCost}, in getArithmeticInstrCost()
458 { ISD::UREM, MVT::v16i8, 16 * FunctionCallDivCost}, in getArithmeticInstrCost()
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| /external/llvm/lib/Target/Lanai/ |
| D | LanaiTargetTransformInfo.h | 73 case ISD::UREM:
|
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 189 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, enumerator
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 195 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, enumerator
|
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| D | AlphaISelLowering.cpp | 98 setOperationAction(ISD::UREM , MVT::i64, Custom); in AlphaTargetLowering()
678 case ISD::UREM: in LowerOperation()
683 SDValue Tmp1 = Op.getNode()->getOpcode() == ISD::UREM ? in LowerOperation()
699 case ISD::UREM: opstr = "__remqu"; break; in LowerOperation()
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| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| D | BlackfinISelLowering.cpp | 89 setOperationAction(ISD::UREM, MVT::i16, Expand); in BlackfinTargetLowering()
90 setOperationAction(ISD::UREM, MVT::i32, Expand); in BlackfinTargetLowering()
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| /external/llvm/test/CodeGen/ARM/ |
| D | divmod-eabi.ll | 3 ; All "eabi" (Bare, GNU and Android) must lower SREM/UREM to __aeabi_{u,i}divmod
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 1679 case ISD::UREM: in selectDivRem()
1696 unsigned MFOpc = (ISDOpcode == ISD::SREM || ISDOpcode == ISD::UREM) in selectDivRem()
1803 if (!selectBinaryOp(I, ISD::UREM)) in fastSelectInstruction()
1804 return selectDivRem(I, ISD::UREM); in fastSelectInstruction()
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| D | MipsSEISelLowering.cpp | 171 setOperationAction(ISD::UREM, MVT::i32, Legal); in MipsSETargetLowering()
218 setOperationAction(ISD::UREM, MVT::i64, Legal); in MipsSETargetLowering()
273 setOperationAction(ISD::UREM, Ty, Legal); in addMSAIntType()
2029 return DAG.getNode(ISD::UREM, DL, Op->getValueType(0), Op->getOperand(1), in lowerINTRINSIC_WO_CHAIN()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 145 case ISD::UREM: in LegalizeOp()
|
| D | SelectionDAGBuilder.h | 484 void visitURem(const User &I) { visitBinary(I, ISD::UREM); } in visitURem()
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| D | LegalizeVectorTypes.cpp | 111 case ISD::UREM: in ScalarizeVectorResult()
490 case ISD::UREM: in SplitVectorResult()
1266 case ISD::UREM: in WidenVectorResult()
|
| D | SelectionDAG.cpp | 2039 case ISD::UREM: { in ComputeMaskedBits()
2652 case ISD::UREM: in FoldConstantArithmetic()
2724 case ISD::UREM: in getNode()
3026 case ISD::UREM: in getNode()
3054 case ISD::UREM: in getNode()
5980 case ISD::UREM: return "urem"; in getOperationName()
|
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 103 setOperationAction(ISD::UREM, MVT::i32, Expand); in SystemZTargetLowering()
105 setOperationAction(ISD::UREM, MVT::i64, Expand); in SystemZTargetLowering()
|
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 181 setOperationAction(ISD::UREM, MVT::i8, Expand); in SPUTargetLowering()
187 setOperationAction(ISD::UREM, MVT::i16, Expand); in SPUTargetLowering()
193 setOperationAction(ISD::UREM, MVT::i32, Expand); in SPUTargetLowering()
199 setOperationAction(ISD::UREM, MVT::i64, Expand); in SPUTargetLowering()
205 setOperationAction(ISD::UREM, MVT::i128, Expand); in SPUTargetLowering()
425 setOperationAction(ISD::UREM, VT, Expand); in SPUTargetLowering()
|
| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 155 setOperationAction(ISD::UREM, MVT::i8, Expand); in MSP430TargetLowering()
161 setOperationAction(ISD::UREM, MVT::i16, Expand); in MSP430TargetLowering()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 183 case ISD::UREM: return "urem"; in getOperationName()
|
| D | SelectionDAGBuilder.h | 835 void visitURem(const User &I) { visitBinary(I, ISD::UREM); } in visitURem()
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| D | FastISel.cpp | 442 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && in selectBinaryOp()
1586 return selectBinaryOp(I, ISD::UREM); in selectOperator()
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 148 setOperationAction(ISD::UREM, MVT::i8, Expand); in MSP430TargetLowering()
154 setOperationAction(ISD::UREM, MVT::i16, Expand); in MSP430TargetLowering()
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| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 83 setOperationAction(ISD::UREM, MVT::i64, Expand); in BPFTargetLowering()
|
| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 971 case ISD::UREM: in canOpTrap()
1681 case URem: return ISD::UREM; in InstructionOpcodeToISD()
|
| /external/llvm/docs/ |
| D | ExtendingLLVM.rst | 110 legal operations. The case for ``ISD::UREM`` for expanding a remainder into
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 297 setOperationAction(ISD::UREM, VT, Expand); in AMDGPUTargetLowering()
327 setOperationAction(ISD::UREM, MVT::i32, Expand); in AMDGPUTargetLowering()
382 setOperationAction(ISD::UREM, VT, Expand); in AMDGPUTargetLowering()
1372 SDValue REM_Part = DAG.getNode(ISD::UREM, DL, HalfVT, LHS_Hi, RHS_Lo); in LowerUDIVREM64()
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| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| D | MBlazeISelLowering.cpp | 101 setOperationAction(ISD::UREM, MVT::i32, Expand); in MBlazeTargetLowering()
|