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Searched refs:VFlag (Results 1 – 25 of 47) sorted by relevance

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/external/vixl/test/aarch32/
Dtest-simulator-cond-rdlow-rnlow-operand-immediate-t32.cc171 {VFlag, 0x00000002, 0x00000002},
208 {VFlag, 0xffffff83, 0xffffff83},
223 {VFlag, 0xffffffe0, 0xffffffe0},
244 {VFlag, 0x00007ffe, 0x00007ffe},
274 {VFlag, 0xffff8000, 0xffff8000},
280 {VFlag, 0x00000000, 0x00000000},
297 {VFlag, 0x7ffffffd, 0x7ffffffd},
315 {VFlag, 0x00000020, 0x00000020},
326 {VFlag, 0x00007fff, 0x00007fff},
335 {VFlag, 0x00000001, 0x00000001},
[all …]
Dtest-utils-aarch32.h52 const uint32_t VFlag = 0x10000000; variable
55 const uint32_t NVFlag = NFlag | VFlag;
57 const uint32_t ZVFlag = ZFlag | VFlag;
58 const uint32_t CVFlag = CFlag | VFlag;
60 const uint32_t NZVFlag = NFlag | ZFlag | VFlag;
61 const uint32_t NCVFlag = NFlag | CFlag | VFlag;
62 const uint32_t ZCVFlag = ZFlag | CFlag | VFlag;
63 const uint32_t NZCVFlag = NFlag | ZFlag | CFlag | VFlag;
Dtest-simulator-cond-rd-rn-operand-rm-t32.cc199 {VFlag, 0xabababab, 0xabababab, 0xabababab},
228 {VFlag, 0x00007fff, 0x00007fff, 0x7ffffffe},
244 {VFlag, 0x00000001, 0x00000001, 0x7ffffffe},
261 {VFlag, 0x55555555, 0x55555555, 0x00000001},
274 {VFlag, 0x80000001, 0x80000001, 0x80000000},
283 {VFlag, 0x80000001, 0x80000001, 0x00000000},
297 {VFlag, 0x7ffffffe, 0x7ffffffe, 0x80000001},
313 {VFlag, 0x55555555, 0x55555555, 0x00007ffd},
332 {VFlag, 0x00007ffe, 0x00007ffe, 0xffff8002},
390 {VFlag, 0x00000000, 0x00000000, 0x00007ffd},
[all …]
Dtest-utils-aarch32.cc184 static char FlagV(uint32_t flags) { return (flags & VFlag) ? 'V' : 'v'; } in FlagV()
Dtest-simulator-cond-rd-operand-const-a32.cc169 {VFlag, 0xabababab},
Dtest-simulator-cond-rd-operand-imm16-t32.cc163 {VFlag, 0xabababab},
Dtest-simulator-cond-rd-operand-const-t32.cc169 {VFlag, 0xabababab},
Dtest-simulator-cond-rd-operand-rn-a32.cc176 {VFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-operand-rn-t32.cc176 {VFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-operand-rn-ror-amount-t32.cc170 {VFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-operand-rn-ror-amount-a32.cc170 {VFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rdlow-rnlow-rmlow-t32.cc167 {VFlag, 0xabababab, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-operand-rn-shift-amount-1to32-a32.cc172 {VFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-operand-rn-shift-amount-1to31-t32.cc172 {VFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc172 {VFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-operand-rn-shift-amount-1to31-a32.cc172 {VFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-rn-operand-rm-a32.cc199 {VFlag, 0xabababab, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-rn-t32.cc169 {VFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-rn-a32.cc169 {VFlag, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-rn-operand-rm-ror-amount-t32.cc173 {VFlag, 0xabababab, 0xabababab, 0xabababab},
Dtest-simulator-cond-rd-rn-operand-rm-ror-amount-a32.cc173 {VFlag, 0xabababab, 0xabababab, 0xabababab},
/external/v8/src/arm64/
Dconstants-arm64.h309 VFlag = V_mask, enumerator
312 NVFlag = NFlag | VFlag,
314 ZVFlag = ZFlag | VFlag,
315 CVFlag = CFlag | VFlag,
317 NZVFlag = NFlag | ZFlag | VFlag,
318 NCVFlag = NFlag | CFlag | VFlag,
319 ZCVFlag = ZFlag | CFlag | VFlag,
320 NZCVFlag = NFlag | ZFlag | CFlag | VFlag,
/external/vixl/src/aarch64/
Dconstants-aarch64.h254 VFlag = V_mask, enumerator
257 NVFlag = NFlag | VFlag,
259 ZVFlag = ZFlag | VFlag,
260 CVFlag = CFlag | VFlag,
262 NZVFlag = NFlag | ZFlag | VFlag,
263 NCVFlag = NFlag | CFlag | VFlag,
264 ZCVFlag = ZFlag | CFlag | VFlag,
265 NZCVFlag = NFlag | ZFlag | CFlag | VFlag,
/external/vixl/test/aarch64/
Dtest-utils-aarch64.cc223 static char FlagV(uint32_t flags) { return (flags & VFlag) ? 'V' : 'v'; } in FlagV()
/external/v8/src/compiler/arm64/
Dcode-generator-arm64.cc1420 __ Ccmp(i.OutputRegister(0), -1, VFlag, vc); in AssembleArchInstruction()
1421 __ Fccmp(i.InputFloat32Register(0), i.InputFloat32Register(0), VFlag, in AssembleArchInstruction()
1435 __ Ccmp(i.OutputRegister(0), -1, VFlag, vc); in AssembleArchInstruction()
1436 __ Fccmp(i.InputDoubleRegister(0), i.InputDoubleRegister(0), VFlag, vc); in AssembleArchInstruction()

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