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Searched refs:VT1 (Results 1 – 25 of 41) sorted by relevance

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/external/llvm/unittests/Transforms/IPO/
DWholeProgramDevirt.cpp18 VTableBits VT1; in TEST() local
19 VT1.ObjectSize = 8; in TEST()
20 VT1.Before.BytesUsed = {1 << 0}; in TEST()
21 VT1.After.BytesUsed = {1 << 1}; in TEST()
28 TypeMemberInfo TM1{&VT1, 0}; in TEST()
56 VT1.After.BytesUsed = {0xff, 0, 0, 0, 0xff}; in TEST()
63 VTableBits VT1; in TEST() local
64 VT1.ObjectSize = 8; in TEST()
69 TypeMemberInfo TM1{&VT1, 0}; in TEST()
87 EXPECT_EQ(std::vector<uint8_t>{1}, VT1.Before.Bytes); in TEST()
[all …]
/external/autotest/client/site_tests/graphics_VTSwitch/
Dcontrol.10011 - VT1 and VT2 are not sufficiently different.
12 - VT1 does not remain the same between VT switches.
25 Switches between VT1 and VT2 repeatedly and logs in/out of Chrome to make sure
27 sure each VT remains the same between VT switches, and that VT1 and VT2 are
Dcontrol11 - VT1 and VT2 are not sufficiently different.
12 - VT1 does not remain the same between VT switches.
26 Switches between VT1 and VT2 repeatedly and logs in/out of Chrome to make sure
28 sure each VT remains the same between VT switches, and that VT1 and VT2 are
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DSelectionDAG.h317 SDVTList getVTList(EVT VT1, EVT VT2);
318 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3);
319 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4);
730 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1, EVT VT2);
731 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1,
733 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1,
735 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
738 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1,
740 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1,
742 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1,
[all …]
/external/llvm/include/llvm/CodeGen/
DSelectionDAG.h462 SDVTList getVTList(EVT VT1, EVT VT2);
463 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3);
464 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4);
1023 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1, EVT VT2);
1024 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1,
1026 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1,
1028 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
1030 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1,
1032 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1,
1034 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1,
[all …]
/external/llvm/test/Transforms/WholeProgramDevirt/
Dunique-retval.ll23 ; CHECK: [[VT1:%[^ ]*]] = bitcast [1 x i8*]* {{.*}} to i8*
30 ; CHECK: [[RES1:%[^ ]*]] = icmp eq i8* [[VT1]], bitcast ([1 x i8*]* @vt3 to i8*)
47 ; CHECK: [[RES1:%[^ ]*]] = icmp ne i8* [[VT1]], bitcast ([1 x i8*]* @vt2 to i8*)
Dvirtual-const-prop-end.ll69 ; CHECK: [[VT1:%[^ ]*]] = bitcast [3 x i8*]* {{.*}} to i8*
76 ; CHECK: [[VTGEP1:%[^ ]*]] = getelementptr i8, i8* [[VT1]], i64 28
Dvirtual-const-prop-begin.ll74 ; CHECK: [[VT1:%[^ ]*]] = bitcast [3 x i8*]* {{.*}} to i8*
81 ; CHECK: [[VTGEP1:%[^ ]*]] = getelementptr i8, i8* [[VT1]], i64 -5
Dvirtual-const-prop-check.ll79 ; CHECK: [[VT1:%[^ ]*]] = bitcast [3 x i8*]* {{.*}} to i8*
84 ; CHECK: [[VTGEP1:%[^ ]*]] = getelementptr i8, i8* [[VT1]], i64 -5
/external/llvm/include/llvm/IR/
DLegacyPassNameParser.h90 static int ValLessThan(const PassNameParser::OptionInfo *VT1, in ValLessThan() argument
92 return std::strcmp(VT1->Name, VT2->Name); in ValLessThan()
/external/swiftshader/third_party/LLVM/include/llvm/Support/
DPassNameParser.h89 static int ValLessThan(const void *VT1, const void *VT2) { in ValLessThan() argument
91 return std::strcmp(static_cast<const ValType *>(VT1)->Name, in ValLessThan()
/external/eigen/unsupported/test/
DFFTW.cpp28 template <typename VT1,typename VT2>
29 long double fft_rmse( const VT1 & fftbuf,const VT2 & timebuf) in fft_rmse()
50 template <typename VT1,typename VT2>
51 long double dif_rmse( const VT1 buf1,const VT2 buf2) in dif_rmse()
/external/llvm/lib/Target/MSP430/
DMSP430ISelLowering.h110 bool isTruncateFree(EVT VT1, EVT VT2) const override;
121 bool isZExtFree(EVT VT1, EVT VT2) const override;
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
DMSP430ISelLowering.h106 virtual bool isTruncateFree(EVT VT1, EVT VT2) const;
117 virtual bool isZExtFree(EVT VT1, EVT VT2) const;
DMSP430ISelLowering.cpp999 bool MSP430TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { in isTruncateFree() argument
1000 if (!VT1.isInteger() || !VT2.isInteger()) in isTruncateFree()
1003 return (VT1.getSizeInBits() > VT2.getSizeInBits()); in isTruncateFree()
1011 bool MSP430TargetLowering::isZExtFree(EVT VT1, EVT VT2) const { in isZExtFree() argument
1013 return 0 && VT1 == MVT::i8 && VT2 == MVT::i16; in isZExtFree()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DSelectionDAG.cpp1468 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { in CreateStackTemporary() argument
1469 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), in CreateStackTemporary()
1471 Type *Ty1 = VT1.getTypeForEVT(*getContext()); in CreateStackTemporary()
4591 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { in getVTList() argument
4594 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) in getVTList()
4598 Array[0] = VT1; in getVTList()
4605 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { in getVTList() argument
4608 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && in getVTList()
4613 Array[0] = VT1; in getVTList()
4621 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { in getVTList() argument
[all …]
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAG.cpp1878 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { in CreateStackTemporary() argument
1879 unsigned Bytes = std::max(VT1.getStoreSize(), VT2.getStoreSize()); in CreateStackTemporary()
1880 Type *Ty1 = VT1.getTypeForEVT(*getContext()); in CreateStackTemporary()
5636 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { in getVTList() argument
5639 ID.AddInteger(VT1.getRawBits()); in getVTList()
5646 Array[0] = VT1; in getVTList()
5654 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { in getVTList() argument
5657 ID.AddInteger(VT1.getRawBits()); in getVTList()
5665 Array[0] = VT1; in getVTList()
5674 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { in getVTList() argument
[all …]
/external/kernel-headers/original/uapi/asm-generic/
Dtermbits.h106 #define VT1 0040000 macro
/external/clang/test/SemaCXX/
Dattr-mode-tmpl.cpp28 …typedef T __attribute__((mode(V2SI))) VT1; // expected-error{{mode attribute only supported for in… in CheckPrimitiveTypes() typedef
/external/kernel-headers/original/uapi/asm-mips/asm/
Dtermbits.h126 #define VT1 0040000 macro
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelLowering.h649 virtual bool isTruncateFree(EVT VT1, EVT VT2) const;
660 virtual bool isZExtFree(EVT VT1, EVT VT2) const;
665 virtual bool isNarrowingProfitable(EVT VT1, EVT VT2) const;
/external/python/cpython2/Modules/
Dtermios.c480 #ifdef VT1
481 {"VT1", VT1},
/external/llvm/lib/Target/X86/
DX86ISelLowering.h863 bool isTruncateFree(EVT VT1, EVT VT2) const override;
876 bool isZExtFree(EVT VT1, EVT VT2) const override;
891 bool isNarrowingProfitable(EVT VT1, EVT VT2) const override;
/external/swiftshader/third_party/LLVM/include/llvm/Target/
DTargetLowering.h548 EVT VT1, RegisterVT; in getRegisterType() local
550 (void)getVectorTypeBreakdown(Context, VT, VT1, in getRegisterType()
574 EVT VT1, VT2; in getNumRegisters() local
576 return getVectorTypeBreakdown(Context, VT, VT1, NumIntermediates, VT2); in getNumRegisters()
/external/python/cpython2/Lib/plat-irix5/
DIOCTL.py121 VT1 = 0040000 variable

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